periph_cpu_common.h
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1 /*
2  * Copyright (C) 2016 Leon George
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
21 #include "cpu.h"
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
30 #define CPUID_ADDR (&FCFG->MAC_BLE_0)
34 #define CPUID_LEN (16U)
35 
40 #define PROVIDES_PM_SET_LOWEST_CORTEXM
43 #ifndef DOXYGEN
47 #define HAVE_GPIO_MODE_T
48 typedef enum {
49  GPIO_IN = (IOCFG_INPUT_ENABLE | IOCFG_PULLCTL_OFF),
50  GPIO_IN_PD = (IOCFG_INPUT_ENABLE | IOCFG_PULLCTL_DOWN),
51  GPIO_IN_PU = (IOCFG_INPUT_ENABLE | IOCFG_PULLCTL_UP),
55 } gpio_mode_t;
56 
60 #define HAVE_GPIO_FLANK_T
61 typedef enum {
65 } gpio_flank_t;
66 
70 #define GPIO_PIN(x, y) (((x) & 0) | (y))
71 
72 /*
73  * @brief Invalid UART mode mask
74  *
75  * This mask is also used to force data_bits_t to be uint32_t type
76  * since it may be assigned a uint32_t variable in uart_mode
77  */
78 #define UART_INVALID_MODE (0x8000000)
79 
84 #define HAVE_UART_PARITY_T
85 typedef enum {
86  UART_PARITY_NONE = 0,
87  UART_PARITY_EVEN = (UART_LCRH_PEN | UART_LCRH_EPS),
88  UART_PARITY_ODD = UART_LCRH_PEN,
98 #define HAVE_UART_DATA_BITS_T
99 typedef enum {
100  UART_DATA_BITS_5 = UART_LCRH_WLEN_5,
101  UART_DATA_BITS_6 = UART_LCRH_WLEN_6,
102  UART_DATA_BITS_7 = UART_LCRH_WLEN_7,
103  UART_DATA_BITS_8 = UART_LCRH_WLEN_8
111 #define HAVE_UART_STOP_BITS_T
112 typedef enum {
113  UART_STOP_BITS_1 = 0,
114  UART_STOP_BITS_2 = UART_LCRH_STP2,
122 typedef struct {
123  uart_regs_t *regs;
124  int tx_pin;
125  int rx_pin;
126 #ifdef MODULE_PERIPH_UART_HW_FC
127  int rts_pin;
128  int cts_pin;
129 #endif
130  int intn;
131 } uart_conf_t;
140 typedef struct {
141  uint8_t cfg;
142  uint8_t chn;
143 } timer_conf_t;
144 
155 #define TIMER_CHANNEL_NUMOF 2
156 
157 #define PERIPH_I2C_NEED_READ_REG
158 #define PERIPH_I2C_NEED_READ_REGS
159 #define PERIPH_I2C_NEED_WRITE_REG
160 #define PERIPH_I2C_NEED_WRITE_REGS
161 
162 #endif /* ifndef DOXYGEN */
163 
164 #ifdef __cplusplus
165 }
166 #endif
167 
@ GPIO_OUT
select GPIO MASK as output
Definition: periph_cpu.h:164
@ GPIO_IN
select GPIO MASK as input
Definition: periph_cpu.h:163
#define IOCFG_EDGEDET_BOTH
edge detection on both edges
#define IOCFG_IOMODE_OPEN_DRAIN
open drain
#define IOCFG_PULLCTL_DOWN
pull down
#define IOCFG_EDGEDET_RISING
edge detection on rising edge
#define IOCFG_PULLCTL_UP
pull up
#define IOCFG_PULLCTL_OFF
no IO pull
#define IOCFG_EDGEDET_FALLING
edge detection on falling edge
gpio_mode_t
Available pin modes.
Definition: periph_cpu.h:91
@ GPIO_FALLING
emit interrupt on falling flank
@ GPIO_RISING
emit interrupt on rising flank
@ GPIO_BOTH
not supported -> random value
@ GPIO_OD
configure as output in open-drain mode without pull resistor
Definition: gpio.h:123
@ GPIO_IN_PU
configure as input with pull-up resistor
Definition: gpio.h:121
@ GPIO_OD_PU
configure as output in open-drain mode with pull resistor enabled
Definition: gpio.h:125
@ GPIO_IN_PD
configure as input with pull-down resistor
Definition: gpio.h:120
@ UART_PARITY_SPACE
space parity
Definition: periph_cpu.h:506
@ UART_PARITY_NONE
no parity
Definition: periph_cpu.h:502
@ UART_PARITY_EVEN
even parity
Definition: periph_cpu.h:503
@ UART_PARITY_ODD
odd parity
Definition: periph_cpu.h:504
@ UART_PARITY_MARK
mark parity
Definition: periph_cpu.h:505
@ UART_STOP_BITS_2
2 stop bits
Definition: periph_cpu.h:535
@ UART_STOP_BITS_1
1 stop bit
Definition: periph_cpu.h:534
@ UART_DATA_BITS_6
6 data bits
Definition: periph_cpu.h:519
@ UART_DATA_BITS_5
5 data bits
Definition: periph_cpu.h:518
@ UART_DATA_BITS_7
7 data bits
Definition: periph_cpu.h:520
@ UART_DATA_BITS_8
8 data bits
Definition: periph_cpu.h:521
gpio_flank_t
Enumeration of supported GPIO flanks.
uart_parity_t
Definition of possible parity modes.
Definition: periph_cpu.h:501
uart_stop_bits_t
Definition of possible stop bits lengths.
Definition: periph_cpu.h:533
#define UART_INVALID_MODE
Invalid UART mode mask.
Definition: periph_cpu.h:492
uart_data_bits_t
Definition of possible data bits lengths in a UART frame.
Definition: periph_cpu.h:517
Timer device configuration.
Definition: periph_cpu.h:263
UART device configuration.
Definition: periph_cpu.h:217
UART component registers.