cfg_clock_default_180.h
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1 /*
2  * Copyright (C) 2018 Freie Universität Berlin
3  * 2017 OTA keys S.A.
4  * 2018-2020 Inria
5  *
6  * This file is subject to the terms and conditions of the GNU Lesser
7  * General Public License v2.1. See the file LICENSE in the top level
8  * directory for more details.
9  */
10 
11 #pragma once
12 
25 #include "kernel_defines.h"
26 #include "macros/units.h"
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
36 /* The following parameters configure a 180MHz system clock with HSE (8MHz,
37  12MHz or 16MHz) or HSI (16MHz) as PLL input clock.
38  If USB is used and no alternative 48MHz is available, the clock frequency is
39  decreased to 168MHZ so the PLLQ can output 48MHz.
40  */
41 #ifndef CONFIG_CLOCK_PLL_M
42 #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(12))
43 #define CONFIG_CLOCK_PLL_M (12)
44 #elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(16))
45 #define CONFIG_CLOCK_PLL_M (16)
46 #else
47 #define CONFIG_CLOCK_PLL_M (4)
48 #endif
49 #endif
50 #ifndef CONFIG_CLOCK_PLL_N
51 #if (IS_USED(MODULE_PERIPH_USBDEV_CLK) || IS_USED(MODULE_PERIPH_SDMMC_CLK)) && \
52  (defined(CPU_LINE_STM32F405xx) || defined(CPU_LINE_STM32F407xx) || \
53  defined(CPU_LINE_STM32F415xx) || defined(CPU_LINE_STM32F417xx) || \
54  defined(CPU_LINE_STM32F427xx) || defined(CPU_LINE_STM32F429xx) || \
55  defined(CPU_LINE_STM32F437xx) || defined(CPU_LINE_STM32F439xx))
56 #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(8))
57 #define CONFIG_CLOCK_PLL_N (168)
58 #elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(12) || \
59  (CONFIG_CLOCK_HSE == MHZ(16)))
60 #define CONFIG_CLOCK_PLL_N (336)
61 #else
62 #define CONFIG_CLOCK_PLL_N (84)
63 #endif
64 #else
65 #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(8))
66 #define CONFIG_CLOCK_PLL_N (180)
67 #elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(12) || \
68  (CONFIG_CLOCK_HSE == MHZ(16)))
69 #define CONFIG_CLOCK_PLL_N (360)
70 #else
71 #define CONFIG_CLOCK_PLL_N (90)
72 #endif
73 #endif /* MODULE_PERIPH_USBDEV_CLK || MODULE_PERIPH_SDMMC_CLK */
74 #endif
75 #ifndef CONFIG_CLOCK_PLL_P
76 #define CONFIG_CLOCK_PLL_P (2)
77 #endif
78 #ifndef CONFIG_CLOCK_PLL_Q
79 #if (IS_USED(MODULE_PERIPH_USBDEV_CLK) || IS_USED(MODULE_PERIPH_SDMMC_CLK)) && \
80  (defined(CPU_LINE_STM32F405xx) || defined(CPU_LINE_STM32F407xx) || \
81  defined(CPU_LINE_STM32F415xx) || defined(CPU_LINE_STM32F417xx) || \
82  defined(CPU_LINE_STM32F427xx) || defined(CPU_LINE_STM32F429xx) || \
83  defined(CPU_LINE_STM32F437xx) || defined(CPU_LINE_STM32F439xx))
84 #define CONFIG_CLOCK_PLL_Q (7)
85 #else
86 #define CONFIG_CLOCK_PLL_Q (8)
87 #endif
88 #endif
89 #ifndef CONFIG_CLOCK_PLL_R
90 #define CONFIG_CLOCK_PLL_R (8)
91 #endif
98 #ifndef CONFIG_CLOCK_APB1_DIV
99 #define CONFIG_CLOCK_APB1_DIV (4) /* max 45MHz */
100 #endif
101 #ifndef CONFIG_CLOCK_APB2_DIV
102 #define CONFIG_CLOCK_APB2_DIV (2) /* max 90MHz */
103 #endif
106 #if CLOCK_CORECLOCK > MHZ(180)
107 #error "SYSCLK cannot exceed 180MHz"
108 #endif
109 
110 #ifdef __cplusplus
111 }
112 #endif
113 
kernel_defines.h
Common macros and compiler attributes/pragmas configuration.
units.h
Unit helper macros.