periph_cpu_common.h

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/*
 * SPDX-FileCopyrightText: 2016 Leon George
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once
 
#include "cpu.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define CPUID_ADDR          (&FCFG->MAC_BLE_0)
#define CPUID_LEN           (16U)
 
#define PROVIDES_PM_SET_LOWEST_CORTEXM
#ifndef DOXYGEN
#define HAVE_GPIO_MODE_T
typedef enum {
    GPIO_IN    = (IOCFG_INPUT_ENABLE | IOCFG_PULLCTL_OFF),      
    GPIO_IN_PD = (IOCFG_INPUT_ENABLE | IOCFG_PULLCTL_DOWN),     
    GPIO_IN_PU = (IOCFG_INPUT_ENABLE | IOCFG_PULLCTL_UP),       
    GPIO_OUT   = (IOCFG_PULLCTL_OFF),                           
    GPIO_OD    = (IOCFG_IOMODE_OPEN_DRAIN | IOCFG_PULLCTL_OFF), 
    GPIO_OD_PU = (IOCFG_IOMODE_OPEN_DRAIN | IOCFG_PULLCTL_UP)   
} gpio_mode_t;
 
#define HAVE_GPIO_FLANK_T
typedef enum {
    GPIO_FALLING = IOCFG_EDGEDET_FALLING,
    GPIO_RISING = IOCFG_EDGEDET_RISING,
    GPIO_BOTH = IOCFG_EDGEDET_BOTH
} gpio_flank_t;
 
#define GPIO_PIN(x, y)  (((x) & 0) | (y))
 
/*
 * @brief   Invalid UART mode mask
 *
 * This mask is also used to force data_bits_t to be uint32_t type
 * since it may be assigned a uint32_t variable in uart_mode
 */
#define UART_INVALID_MODE   (0x8000000)
 
#define HAVE_UART_PARITY_T
typedef enum {
   UART_PARITY_NONE = 0,
   UART_PARITY_EVEN = (UART_LCRH_PEN | UART_LCRH_EPS),
   UART_PARITY_ODD = UART_LCRH_PEN,
   UART_PARITY_MARK = UART_INVALID_MODE | 4,
   UART_PARITY_SPACE = UART_INVALID_MODE | 5
} uart_parity_t;
#define HAVE_UART_DATA_BITS_T
typedef enum {
    UART_DATA_BITS_5 = UART_LCRH_WLEN_5,
    UART_DATA_BITS_6 = UART_LCRH_WLEN_6,
    UART_DATA_BITS_7 = UART_LCRH_WLEN_7,
    UART_DATA_BITS_8 = UART_LCRH_WLEN_8
} uart_data_bits_t;
#define HAVE_UART_STOP_BITS_T
typedef enum {
   UART_STOP_BITS_1 = 0,
   UART_STOP_BITS_2 = UART_LCRH_STP2,
} uart_stop_bits_t;
typedef struct {
   uart_regs_t *regs;
   int tx_pin;
   int rx_pin;
#ifdef MODULE_PERIPH_UART_HW_FC
   int rts_pin;
   int cts_pin;
#endif
   int intn;
} uart_conf_t;
typedef struct {
    uint8_t     cfg;    
    uint8_t     chn;    
} timer_conf_t;
 
#define TIMER_CHANNEL_NUMOF 2
 
#define PERIPH_I2C_NEED_READ_REG
#define PERIPH_I2C_NEED_READ_REGS
#define PERIPH_I2C_NEED_WRITE_REG
#define PERIPH_I2C_NEED_WRITE_REGS
 
#endif /* ifndef DOXYGEN */
 
#ifdef __cplusplus
}
#endif