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periph_cpu.h File Reference
CPU » Native CPU

CPU specific definitions for internal peripheral handling. More...

Detailed Description

CPU specific definitions for internal peripheral handling.

Author
Hauke Petersen hauke.nosp@m..pet.nosp@m.ersen.nosp@m.@fu-.nosp@m.berli.nosp@m.n.de

Definition in file periph_cpu.h.

#include "periph_conf.h"
#include <linux/gpio.h>
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Macros

#define CPUID_LEN   (4U)
 Length of the CPU_ID in octets.
 
#define PM_NUM_MODES   (1U)
 Power mode configuration.
 
#define PROVIDES_PM_LAYERED_OFF
 We provide our own pm_off() function for the native CPU.
 
#define PERIPH_TIMER_PROVIDES_SET
 Prevent shared timer functions from being used.
 
#define EEPROM_SIZE   (1024U) /* 1kB */
 EEPROM configuration.
 

GPIO Configuration

#define GPIO_PORT_SHIFT   (24)
 The offset between Port and Pin.
 
#define GPIO_PIN(port, pin)   (gpio_t)((port << GPIO_PORT_SHIFT) | pin)
 Define a custom GPIO_PIN macro for native.
 
#define HAVE_GPIO_MODE_T
 Macro indicating whether GPIO modes are available on the native CPU.
 
#define GPIOHANDLE_REQUEST_PULL_DOWN   (0xFF)
 Pull-down.
 
#define GPIOHANDLE_REQUEST_PULL_UP   (0xFF)
 Pull-up.
 
#define HAVE_GPIO_FLANK_T
 A macro indicating whether the native CPU supports GPIO edge behavior.
 
enum  gpio_mode_t {
  GPIO_IN = GPIOHANDLE_REQUEST_INPUT , GPIO_IN_PD = GPIOHANDLE_REQUEST_INPUT | GPIOHANDLE_REQUEST_PULL_DOWN , GPIO_IN_PU = GPIOHANDLE_REQUEST_INPUT | GPIOHANDLE_REQUEST_PULL_UP , GPIO_OUT = GPIOHANDLE_REQUEST_OUTPUT ,
  GPIO_OD = GPIOHANDLE_REQUEST_OPEN_DRAIN , GPIO_OD_PU = GPIOHANDLE_REQUEST_OPEN_DRAIN | GPIOHANDLE_REQUEST_PULL_UP , GPIO_IN , GPIO_IN_PD ,
  GPIO_IN_PU , GPIO_OUT , GPIO_OD , GPIO_OD_PU
}
 Available pin modes. More...
 
enum  gpio_flank_t {
  GPIO_ISC_BOTH = (0 << 4) , GPIO_ISC_RISING = (1 << 4) , GPIO_ISC_FALLING = (2 << 4) , GPIO_ISC_LOW_LEVEL = (3 << 4) ,
  GPIO_INT_DISABLED_ALL = (1 << 3) , GPIO_INT0_VCT = (0 << 2) , GPIO_INT1_VCT = (1 << 2) , GPIO_LVL_OFF = (0 << 0) ,
  GPIO_LVL_LOW = (1 << 0) , GPIO_LVL_MID = (2 << 0) , GPIO_LVL_HIGH = (3 << 0) , GPIO_FALLING = GPIO_ISC_FALLING | GPIO_LVL_LOW ,
  GPIO_RISING = GPIO_ISC_RISING | GPIO_LVL_LOW , GPIO_BOTH = GPIO_ISC_BOTH | GPIO_LVL_LOW , GPIO_FALLING = 0xff , GPIO_RISING = 0x00 ,
  GPIO_BOTH = 0xab , GPIO_FALLING = GPIOEVENT_EVENT_FALLING_EDGE , GPIO_RISING = GPIOEVENT_EVENT_RISING_EDGE , GPIO_BOTH = GPIO_FALLING | GPIO_RISING ,
  GPIO_LEVEL_LOW = 0x1 , GPIO_LEVEL_HIGH = 0x2 , GPIO_FALLING = 0x4 , GPIO_RISING = 0x8 ,
  GPIO_BOTH = 0xc , GPIO_FALLING = 0 , GPIO_RISING = 1 , GPIO_BOTH = 2
}
 An enum for the type of flank that emit interrupts. More...
 

SPI Configuration

#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
 Use the common transfer_byte SPI function.
 
#define PERIPH_SPI_NEEDS_TRANSFER_REG
 Use the common transfer_reg SPI function.
 
#define PERIPH_SPI_NEEDS_TRANSFER_REGS
 Use the common transfer_regs SPI function.