Implementation specific CPU configuration options. More...
Implementation specific CPU configuration options.
Definition in file cpu_conf.h.
#include "cpu_conf_common.h"#include "vendor/nrf51.h"#include "vendor/nrf51_bitfields.h"#include "vendor/nrf51822_peripherals.h"
 Include dependency graph for cpu_conf.h:Go to the source code of this file.
| #define | CPU_DEFAULT_IRQ_PRIO (1U) | 
| ARM Cortex-M specific CPU configuration.  | |
| #define | CPU_IRQ_NUMOF (26U) | 
| #define | CPU_FLASH_BASE (0x00000000) | 
| #define | FLASHPAGE_SIZE (1024U) | 
| Flash page configuration.  | |
| #define | FLASHPAGE_WRITE_BLOCK_SIZE (4U) | 
| #define | FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U) | 
| #define | CONFIG_GNRC_PKTBUF_SIZE (2048) | 
| Due to RAM restrictions, we need to limit the default GNRC packet buffer size on these CPUs.  | |
| #define | PWM_GPIOTE_CH (2U) | 
| CPU specific PWM configuration.  | |
| #define | PWM_PPI_A (0U) | 
| #define | PWM_PPI_B (1U) |