20 #ifndef CANDEV_SAMD5X_H
21 #define CANDEV_SAMD5X_H
27 #if defined(CAN_INST_NUM)
30 #ifndef CANDEV_SAMD5X_DEFAULT_BITRATE
32 #define CANDEV_SAMD5X_DEFAULT_BITRATE 500000U
35 #ifndef CANDEV_SAMD5X_DEFAULT_SPT
37 #define CANDEV_SAMD5X_DEFAULT_SPT 875
40 #ifndef CANDEV_SAMD5X_DEFAULT_STD_FILTER_NUM
41 #define CANDEV_SAMD5X_DEFAULT_STD_FILTER_NUM 3
44 #ifndef CANDEV_SAMD5X_DEFAULT_EXT_FILTER_NUM
45 #define CANDEV_SAMD5X_DEFAULT_EXT_FILTER_NUM 3
48 #ifndef CANDEV_SAMD5X_DEFAULT_RX_FIFO_0_ELTS_NUM
49 #define CANDEV_SAMD5X_DEFAULT_RX_FIFO_0_ELTS_NUM 32
52 #ifndef CANDEV_SAMD5X_DEFAULT_RX_FIFO_1_ELTS_NUM
53 #define CANDEV_SAMD5X_DEFAULT_RX_FIFO_1_ELTS_NUM 32
56 #ifndef CANDEV_SAMD5X_DEFAULT_TX_EVT_FIFO_ELTS_NUM
57 #define CANDEV_SAMD5X_DEFAULT_TX_EVT_FIFO_ELTS_NUM 16
60 #ifndef CANDEV_SAMD5X_DEFAULT_TX_BUFFER_NUM
61 #define CANDEV_SAMD5X_DEFAULT_TX_BUFFER_NUM 16
64 #ifndef CANDEV_SAMD5X_DEFAULT_TX_BUFFER_FIFO_QUEUE_NUM
65 #define CANDEV_SAMD5X_DEFAULT_TX_BUFFER_FIFO_QUEUE_NUM 16
69 #define CANDEV_SAMD5X_MAX_STD_FILTER 128
70 #define CANDEV_SAMD5X_MAX_EXT_FILTER 64
71 #define CANDEV_SAMD5X_MAX_RX_FIFO_0_ELTS 64
72 #define CANDEV_SAMD5X_MAX_RX_FIFO_1_ELTS 64
73 #define CANDEV_SAMD5X_MAX_RX_BUFFER 64
74 #define CANDEV_SAMD5X_MAX_TX_EVT_FIFO_ELTS 32
75 #define CANDEV_SAMD5X_MAX_TX_BUFFER 32
76 #define CANDEV_SAMD5X_MSG_RAM_MAX_SIZE 448
79 #define CANDEV_SAMD5X_NO_ERROR 0
80 #define CANDEV_SAMD5X_STUFF_ERROR 1
81 #define CANDEV_SAMD5X_FORM_ERROR 2
82 #define CANDEV_SAMD5X_ACK_ERROR 3
83 #define CANDEV_SAMD5X_BIT1_ERROR 4
84 #define CANDEV_SAMD5X_BIT0_ERROR 5
85 #define CANDEV_SAMD5X_CRC_ERROR 6
86 #define CANDEV_SAMD5X_NO_CHANGE_ERROR 7
112 bool enable_pin_active_low;
114 #define HAVE_CAN_CONF_T
121 CanMramSidfe std_filter[CANDEV_SAMD5X_DEFAULT_STD_FILTER_NUM];
123 CanMramXifde ext_filter[CANDEV_SAMD5X_DEFAULT_EXT_FILTER_NUM];
125 CanMramRxf0e rx_fifo_0[CANDEV_SAMD5X_DEFAULT_RX_FIFO_0_ELTS_NUM];
127 CanMramRxf1e rx_fifo_1[CANDEV_SAMD5X_DEFAULT_RX_FIFO_1_ELTS_NUM];
129 CanMramRxbe rx_buffer[CANDEV_SAMD5X_MAX_RX_BUFFER];
131 CanMramTxefe tx_event_fifo[CANDEV_SAMD5X_DEFAULT_TX_EVT_FIFO_ELTS_NUM];
133 CanMramTxbe tx_fifo_queue[CANDEV_SAMD5X_DEFAULT_TX_BUFFER_FIFO_QUEUE_NUM];
145 msg_ram_conf_t msg_ram_conf;
149 bool tx_fifo_queue_ctrl;
159 void candev_samd5x_tdc_control(
can_t *dev);
Definitions for low-level CAN driver interface.
struct can can_t
Low level device structure for ESP32 CAN (extension of candev_t)
gpio_mode_t
Available pin modes.
struct candev_conf can_conf_t
Linux candev configuration.
ESP CAN device configuration.
Low level device structure for ESP32 CAN (extension of candev_t)
Structure to hold driver state.