cfg_timer_tim2_tim15_tim16.h
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1 /*
2  * Copyright (C) 2023 Otto-von-Guericke-Universität Magdeburg
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
20 #ifndef CFG_TIMER_TIM2_TIM15_TIM16_H
21 #define CFG_TIMER_TIM2_TIM15_TIM16_H
22 
23 #include "periph_cpu.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
29 /* Please note: This likely needs some generalization for use in STM32 families
30  * other than L4. */
35 static const timer_conf_t timer_config[] = {
36  {
37  .dev = TIM2,
38  .max = 0xffffffff,
39 #if defined(RCC_APB1ENR_TIM2EN)
40  .rcc_mask = RCC_APB1ENR_TIM2EN,
41 #else
42  .rcc_mask = RCC_APB1ENR1_TIM2EN,
43 #endif
44  .bus = APB1,
45  .irqn = TIM2_IRQn
46  },
47  {
48  .dev = TIM15,
49  .max = 0x0000ffff,
50  .rcc_mask = RCC_APB2ENR_TIM15EN,
51  .bus = APB2,
52  .irqn = TIM1_BRK_TIM15_IRQn,
53  .channel_numof = 2,
54  },
55  {
56  .dev = TIM16,
57  .max = 0x0000ffff,
58  .rcc_mask = RCC_APB2ENR_TIM16EN,
59  .bus = APB2,
60  .irqn = TIM1_UP_TIM16_IRQn,
61  .channel_numof = 1,
62  },
63 };
64 
65 #define TIMER_0_ISR isr_tim2
66 #define TIMER_1_ISR isr_tim1_brk_tim15
67 #define TIMER_2_ISR isr_tim1_up_tim16
69 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
72 #ifdef __cplusplus
73 }
74 #endif
75 
76 #endif /* CFG_TIMER_TIM2_TIM15_TIM16_H */
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:80
Timer device configuration.
Definition: periph_cpu.h:264
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:265