Default STM32L0/STM32L1 clock configuration. More...
Default STM32L0/STM32L1 clock configuration.
Definition in file cfg_clock_default.h.
#include "cfg_clock_common_lx_u5_wx.h"
#include "kernel_defines.h"
#include "macros/units.h"
#include "periph_cpu.h"
Go to the source code of this file.
L0/L1 clock system configuration | |
#define | CONFIG_CLOCK_PLL_DIV (2) |
#define | CONFIG_CLOCK_PLL_MUL (4) |
#define | CLOCK_AHB CLOCK_CORECLOCK /* max: 32MHz */ |
#define | CONFIG_CLOCK_APB1_DIV (1) |
#define | CLOCK_APB1 (CLOCK_CORECLOCK / CONFIG_CLOCK_APB1_DIV) /* max: 32MHz */ |
#define | CONFIG_CLOCK_APB2_DIV (1) |
#define | CLOCK_APB2 (CLOCK_CORECLOCK / CONFIG_CLOCK_APB2_DIV) /* max: 32MHz */ |