cfg_timer_default.h
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1 /*
2  * Copyright (C) 2020 Koen Zandberg <koen@bergzand.net>
3  * 2023 Gunar Schorcht <gunar@schorcht.net>
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
21 #ifndef CFG_TIMER_DEFAULT_H
22 #define CFG_TIMER_DEFAULT_H
23 
24 #include "periph_cpu.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
39 static const timer_conf_t timer_config[] = {
40  {
41  .dev = TIMER0,
42  .max = 0x0000ffff,
43  .rcu_mask = RCU_APB2EN_TIMER0EN_Msk,
44  .bus = APB2,
45  .irqn = TIMER0_Channel_IRQn
46  },
47  {
48  .dev = TIMER1,
49  .max = 0x0000ffff,
50  .rcu_mask = RCU_APB1EN_TIMER1EN_Msk,
51  .bus = APB1,
52  .irqn = TIMER1_IRQn
53  },
54 #if !defined(MODULE_PERIPH_PM)
55  {
56  .dev = TIMER2,
57  .max = 0x0000ffff,
58  .rcu_mask = RCU_APB1EN_TIMER2EN_Msk,
59  .bus = APB1,
60  .irqn = TIMER2_IRQn
61  },
62 #if defined(CPU_MODEL_GD32VF103C8T6) || defined(CPU_MODEL_GD32VF103CBT6) || \
63  defined(CPU_MODEL_GD32VF103R8T6) || defined(CPU_MODEL_GD32VF103RBT6) || \
64  defined(CPU_MODEL_GD32VF103T8U6) || defined(CPU_MODEL_GD32VF103TBU6) || \
65  defined(CPU_MODEL_GD32VF103V8T6) || defined(CPU_MODEL_GD32VF103VBT6)
66  {
67  .dev = TIMER3,
68  .max = 0x0000ffff,
69  .rcu_mask = RCU_APB1EN_TIMER3EN_Msk,
70  .bus = APB1,
71  .irqn = TIMER3_IRQn
72  },
73  {
74  .dev = TIMER4,
75  .max = 0x0000ffff,
76  .rcu_mask = RCU_APB1EN_TIMER4EN_Msk,
77  .bus = APB1,
78  .irqn = TIMER4_IRQn
79  }
80 #endif
81 #endif /* !defined(MODULE_PERIPH_PWM) */
82 };
83 
84 #define TIMER_0_IRQN TIMER0_Channel_IRQn
85 #define TIMER_1_IRQN TIMER1_IRQn
86 
87 #if !defined(MODULE_PERIPH_PWM)
88 #define TIMER_2_IRQN TIMER2_IRQn
89 #if defined(CPU_MODEL_GD32VF103C8T6) || defined(CPU_MODEL_GD32VF103CBT6) || \
90  defined(CPU_MODEL_GD32VF103R8T6) || defined(CPU_MODEL_GD32VF103RBT6) || \
91  defined(CPU_MODEL_GD32VF103T8U6) || defined(CPU_MODEL_GD32VF103TBU6) || \
92  defined(CPU_MODEL_GD32VF103V8T6) || defined(CPU_MODEL_GD32VF103VBT6)
93 #define TIMER_3_IRQN TIMER3_IRQn
94 #define TIMER_4_IRQN TIMER4_IRQn
95 #endif
96 #endif /* !defined(MODULE_PERIPH_PWM) */
97 
98 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
101 #ifdef __cplusplus
102 }
103 #endif
104 
105 #endif /* CFG_TIMER_DEFAULT_H */
APB1
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:79
APB2
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:80
timer_config
static const timer_conf_t timer_config[]
Configuration of the exposed timers.
Definition: cfg_timer_default.h:40
timer_conf_t
Timer device configuration.
Definition: periph_cpu.h:264
timer_conf_t::dev
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:265