candev_samd5x.h

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/*
 * SPDX-FileCopyrightText: 2024 ML!PA Consulting GmbH
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined(CAN_INST_NUM)
#  include "can/candev.h"
 
#  ifndef CANDEV_SAMD5X_DEFAULT_BITRATE
#    define CANDEV_SAMD5X_DEFAULT_BITRATE 500000U
#  endif
 
#  ifndef CANDEV_SAMD5X_DEFAULT_SPT
#    define CANDEV_SAMD5X_DEFAULT_SPT 875
#  endif
 
#  ifndef CANDEV_SAMD5X_DEFAULT_STD_FILTER_NUM
#    define CANDEV_SAMD5X_DEFAULT_STD_FILTER_NUM 3
#  endif
 
#  ifndef CANDEV_SAMD5X_DEFAULT_EXT_FILTER_NUM
#    define CANDEV_SAMD5X_DEFAULT_EXT_FILTER_NUM 3
#  endif
 
#  ifndef CANDEV_SAMD5X_DEFAULT_RX_FIFO_0_ELTS_NUM
#    define CANDEV_SAMD5X_DEFAULT_RX_FIFO_0_ELTS_NUM 32
#  endif
 
#  ifndef CANDEV_SAMD5X_DEFAULT_RX_FIFO_1_ELTS_NUM
#    define CANDEV_SAMD5X_DEFAULT_RX_FIFO_1_ELTS_NUM 32
#  endif
 
#  ifndef CANDEV_SAMD5X_DEFAULT_TX_EVT_FIFO_ELTS_NUM
#    define CANDEV_SAMD5X_DEFAULT_TX_EVT_FIFO_ELTS_NUM 16
#  endif
 
#  ifndef CANDEV_SAMD5X_DEFAULT_TX_BUFFER_NUM
#    define CANDEV_SAMD5X_DEFAULT_TX_BUFFER_NUM 16
#  endif
 
#  ifndef CANDEV_SAMD5X_DEFAULT_TX_BUFFER_FIFO_QUEUE_NUM
#    define CANDEV_SAMD5X_DEFAULT_TX_BUFFER_FIFO_QUEUE_NUM 16
#  endif
 
/* unit: elements */
#  define CANDEV_SAMD5X_MAX_STD_FILTER 128
#  define CANDEV_SAMD5X_MAX_EXT_FILTER 64
#  define CANDEV_SAMD5X_MAX_RX_FIFO_0_ELTS 64
#  define CANDEV_SAMD5X_MAX_RX_FIFO_1_ELTS 64
#  define CANDEV_SAMD5X_MAX_RX_BUFFER 64
#  define CANDEV_SAMD5X_MAX_TX_EVT_FIFO_ELTS 32
#  define CANDEV_SAMD5X_MAX_TX_BUFFER 32
#  define CANDEV_SAMD5X_MSG_RAM_MAX_SIZE 448
 
/* SAMD5x CAN controller error codes (values from datasheet section 39.8.14) */
#  define CANDEV_SAMD5X_NO_ERROR 0
#  define CANDEV_SAMD5X_STUFF_ERROR 1
#  define CANDEV_SAMD5X_FORM_ERROR 2
#  define CANDEV_SAMD5X_ACK_ERROR 3
#  define CANDEV_SAMD5X_BIT1_ERROR 4
#  define CANDEV_SAMD5X_BIT0_ERROR 5
#  define CANDEV_SAMD5X_CRC_ERROR 6
#  define CANDEV_SAMD5X_NO_CHANGE_ERROR 7
 
typedef struct {
    Can *can;
    uint32_t bitrate; 
    gpio_t rx_pin;
    gpio_t tx_pin;
    gpio_t enable_pin;
    gpio_mode_t enable_pin_mode;
    uint8_t gclk_src;
    bool enable_pin_active_low            : 1;
    bool disable_automatic_retransmission : 1;
    bool enable_transmit_pause            : 1;
    bool start_in_monitor_mode            : 1;
} can_conf_t;
#  define HAVE_CAN_CONF_T
 
typedef struct can_msg_ram {
    CanMramSidfe std_filter[CANDEV_SAMD5X_DEFAULT_STD_FILTER_NUM];
    CanMramXifde ext_filter[CANDEV_SAMD5X_DEFAULT_EXT_FILTER_NUM];
    CanMramRxf0e rx_fifo_0[CANDEV_SAMD5X_DEFAULT_RX_FIFO_0_ELTS_NUM];
    CanMramRxf1e rx_fifo_1[CANDEV_SAMD5X_DEFAULT_RX_FIFO_1_ELTS_NUM];
    CanMramRxbe rx_buffer[CANDEV_SAMD5X_MAX_RX_BUFFER];
    CanMramTxefe tx_event_fifo[CANDEV_SAMD5X_DEFAULT_TX_EVT_FIFO_ELTS_NUM];
    CanMramTxbe tx_buffer[CANDEV_SAMD5X_DEFAULT_TX_BUFFER_FIFO_QUEUE_NUM];
} can_msg_ram_t;
 
typedef struct {
    candev_t candev;
    const can_conf_t *conf;
    struct {
        uint8_t last_error_code;
        uint8_t d_last_error_code;
        uint8_t tx_error_count;
        uint8_t rx_error_count;
    } state;
    can_msg_ram_t msg_ram;
    bool tdc_ctrl;
} can_t;
#  define HAVE_CAN_T
 
void candev_samd5x_tdc_control(can_t *dev);
 
void candev_samd5x_enter_sleep_mode(candev_t *candev);
 
void candev_samd5x_exit_sleep_mode(candev_t *candev);
 
#endif /* CAN_INST_NUM */
 
#ifdef __cplusplus
}
#endif