clk_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2020 Inria
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F1) || \
19  defined(CPU_FAM_STM32F3)
20 #include "f0f1f3/cfg_clock_default.h"
21 #elif defined(CPU_FAM_STM32F2) || defined(CPU_FAM_STM32F4) || \
22  defined(CPU_FAM_STM32F7)
23 #include "f2f4f7/cfg_clock_default.h"
24 #elif defined(CPU_FAM_STM32G0) || defined(CPU_FAM_STM32G4)
25 #include "g0g4/cfg_clock_default.h"
26 #elif defined(CPU_FAM_STM32C0)
27 #include "c0/cfg_clock_default.h"
28 #elif defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1)
29 #include "l0l1/cfg_clock_default.h"
30 #elif defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32L5) || \
31  defined(CPU_FAM_STM32WB) || defined(CPU_FAM_STM32WL)
32 #include "l4l5wx/cfg_clock_default.h"
33 #elif defined(CPU_FAM_STM32U5)
34 #include "u5/cfg_clock_default.h"
35 #elif defined(CPU_FAM_STM32MP1)
36 #include "mp1/cfg_clock_default.h"
37 #else
38 #error "No clock configuration available"
39 #endif
40 
41 #ifdef __cplusplus
42 extern "C" {
43 #endif
44 
45 #ifdef __cplusplus
46 }
47 #endif
48 
cfg_clock_default.h
Configure STM32C0 clock.
cfg_clock_default.h
Default clock configuration for STM32F0/F1/F3.
cfg_clock_default.h
Main header for STM32F2/F4/F7 clock configuration.
cfg_clock_default.h
Configure STM32G0/G4 clock.
cfg_clock_default.h
Default STM32L0/STM32L1 clock configuration.
cfg_clock_default.h
Default STM32L4 clock configuration.
cfg_clock_default.h
Main header for STM32MP1 clock configuration.
cfg_clock_default.h
Default STM32U5 clock configuration.