periph_cpu.h
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1 /*
2  * SPDX-FileCopyrightText: 2020 Inria
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
19 #ifdef __cplusplus
20 extern "C" {
21 #endif
22 
23 #ifndef DOXYGEN
24 
29 #define STM32_BOOTLOADER_ADDR (0x1FFF0000)
30 
35 #define HAVE_ADC_RES_T
36 typedef enum {
37  ADC_RES_6BIT = (ADC_CFGR1_RES),
38  ADC_RES_8BIT = (ADC_CFGR1_RES_1),
39  ADC_RES_10BIT = (ADC_CFGR1_RES_0),
40  ADC_RES_12BIT = (0x00),
41  ADC_RES_14BIT = (0xfe),
42  ADC_RES_16BIT = (0xff)
43 } adc_res_t;
50 #define VBAT_ADC_RES ADC_RES_12BIT
51 #define VBAT_ADC_MAX 4095
54 #endif /* ndef DOXYGEN */
55 
59 #if defined(CPU_LINE_STM32G0B1xx) || defined(CPU_LINE_STM32G081xx) || \
60  defined(CPU_LINE_STM32G071xx) || defined(CPU_LINE_STM32G0C1xx)
61 #define TIM6_DAC_LPTIM1_SHARED_IRQ
62 #endif
63 
64 #ifdef __cplusplus
65 }
66 #endif
67 
adc_res_t
adc_res_t
Possible ADC resolution settings.
Definition: adc.h:92
ADC_RES_16BIT
@ ADC_RES_16BIT
ADC resolution: 16 bit.
Definition: adc.h:98
ADC_RES_8BIT
@ ADC_RES_8BIT
ADC resolution: 8 bit.
Definition: adc.h:94
ADC_RES_14BIT
@ ADC_RES_14BIT
ADC resolution: 14 bit.
Definition: adc.h:97
ADC_RES_6BIT
@ ADC_RES_6BIT
ADC resolution: 6 bit.
Definition: adc.h:93
ADC_RES_10BIT
@ ADC_RES_10BIT
ADC resolution: 10 bit.
Definition: adc.h:95
ADC_RES_12BIT
@ ADC_RES_12BIT
ADC resolution: 12 bit.
Definition: adc.h:96