22 #ifndef CONFIG_BOARD_HAS_LSE
23 #define CONFIG_BOARD_HAS_LSE 1
26 #include "periph_cpu.h"
42 .rcc_mask = RCC_APB2ENR_USART1EN,
54 .rcc_mask = RCC_APB1ENR1_USART3EN,
66 .rcc_mask = RCC_APB1ENR1_USART2EN,
78 .rcc_mask = RCC_APB1ENR1_UART4EN,
90 #define UART_0_ISR (isr_usart1)
91 #define UART_1_ISR (isr_usart3)
92 #define UART_2_ISR (isr_usart2)
93 #define UART_3_ISR (isr_uart4)
95 #define UART_NUMOF ARRAY_SIZE(uart_config)
113 .rccmask = RCC_APB2ENR_SPI1EN,
126 .rccmask = RCC_APB1ENR1_SPI2EN,
139 .rccmask = RCC_APB3ENR_SPI3EN,
144 #define SPI_NUMOF ARRAY_SIZE(spi_config)
160 .rcc_mask = RCC_APB1ENR1_I2C1EN,
161 .rcc_sw_mask = RCC_CCIPR1_I2C1SEL_1,
162 .irqn = I2C1_ER_IRQn,
172 .rcc_mask = RCC_APB1ENR1_I2C2EN,
173 .rcc_sw_mask = RCC_CCIPR1_I2C2SEL_1,
174 .irqn = I2C2_ER_IRQn,
178 #define I2C_0_ISR isr_i2c1_er
179 #define I2C_1_ISR isr_i2c2_er
180 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
static const spi_conf_t spi_config[]
SPI configuration.
static const i2c_conf_t i2c_config[]
I2C configuration.
Common configuration for STM32 Timer peripheral based on TIM5.
Common configuration for STM32 OTG FS peripheral for U5 family.
@ GPIO_AF5
use alternate function 5
@ GPIO_AF4
use alternate function 4
@ GPIO_AF7
use alternate function 7
@ STM32_USART
STM32 USART module type.
@ APB1
Advanced Peripheral Bus 1
@ APB2
Advanced Peripheral Bus 2
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
I2C configuration structure.
TWI_t * dev
Pointer to hardware module registers.
SPI device configuration.
SPI_t * dev
pointer to the used SPI device
UART device configuration.
USART_t * dev
pointer to the used UART device