periph_conf.h
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1 /*
2  * Copyright (C) 2015 Hamburg University of Applied Sciences
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
9 #pragma once
10 
21 #include "periph_cpu.h"
22 #include "clk_conf.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 static const timer_conf_t timer_config[] = {
33  {
34  .dev = TIM5,
35  .max = 0x0000ffff,
36  .rcc_mask = RCC_APB1ENR_TIM5EN,
37  .bus = APB1,
38  .irqn = TIM5_IRQn
39  }
40 };
41 
42 #define TIMER_0_ISR (isr_tim5)
43 
44 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
51 static const uart_conf_t uart_config[] = {
52  {
53  .dev = USART3,
54  .rcc_mask = RCC_APB1ENR_USART3EN,
55  .rx_pin = GPIO_PIN(PORT_C, 11),
56  .tx_pin = GPIO_PIN(PORT_C, 10),
57  .rx_af = GPIO_AF7,
58  .tx_af = GPIO_AF7,
59  .bus = APB1,
60  .irqn = USART3_IRQn
61  },
62  {
63  .dev = USART1,
64  .rcc_mask = RCC_APB2ENR_USART1EN,
65  .rx_pin = GPIO_PIN(PORT_A, 10),
66  .tx_pin = GPIO_PIN(PORT_A, 9),
67  .rx_af = GPIO_AF7,
68  .tx_af = GPIO_AF7,
69  .bus = APB2,
70  .irqn = USART1_IRQn
71  }
72 };
73 
74 #define UART_0_ISR (isr_usart3)
75 #define UART_1_ISR (isr_usart1)
76 
77 #define UART_NUMOF ARRAY_SIZE(uart_config)
84 static const spi_conf_t spi_config[] = {
85  {
86  .dev = SPI1,
87  .mosi_pin = GPIO_PIN(PORT_A, 7),
88  .miso_pin = GPIO_PIN(PORT_A, 6),
89  .sclk_pin = GPIO_PIN(PORT_A, 5),
90  .cs_pin = SPI_CS_UNDEF,
91  .mosi_af = GPIO_AF5,
92  .miso_af = GPIO_AF5,
93  .sclk_af = GPIO_AF5,
94  .cs_af = GPIO_AF5,
95  .rccmask = RCC_APB2ENR_SPI1EN,
96  .apbbus = APB2
97  },
98  {
99  .dev = SPI3,
100  .mosi_pin = GPIO_PIN(PORT_B, 5),
101  .miso_pin = GPIO_PIN(PORT_B, 4),
102  .sclk_pin = GPIO_PIN(PORT_B, 3),
103  .cs_pin = SPI_CS_UNDEF,
104  .mosi_af = GPIO_AF6,
105  .miso_af = GPIO_AF6,
106  .sclk_af = GPIO_AF6,
107  .cs_af = GPIO_AF6,
108  .rccmask = RCC_APB1ENR_SPI3EN,
109  .apbbus = APB1
110  }
111 };
112 
113 #define SPI_NUMOF ARRAY_SIZE(spi_config)
120 static const i2c_conf_t i2c_config[] = {
121  {
122  .dev = I2C1,
123  .speed = I2C_SPEED_NORMAL,
124  .scl_pin = GPIO_PIN(PORT_B, 8),
125  .sda_pin = GPIO_PIN(PORT_B, 9),
126  .scl_af = GPIO_AF4,
127  .sda_af = GPIO_AF4,
128  .bus = APB1,
129  .rcc_mask = RCC_APB1ENR_I2C1EN,
130  .clk = CLOCK_APB1,
131  .irqn = I2C1_EV_IRQn
132  },
133  {
134  .dev = I2C2,
135  .speed = I2C_SPEED_NORMAL,
136  .scl_pin = GPIO_PIN(PORT_B, 10),
137  .sda_pin = GPIO_PIN(PORT_B, 11),
138  .scl_af = GPIO_AF4,
139  .sda_af = GPIO_AF4,
140  .bus = APB1,
141  .rcc_mask = RCC_APB1ENR_I2C2EN,
142  .clk = CLOCK_APB1,
143  .irqn = I2C2_EV_IRQn
144  }
145 };
146 
147 #define I2C_0_ISR isr_i2c1_ev
148 #define I2C_1_ISR isr_i2c2_ev
149 
150 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
153 #ifdef __cplusplus
154 }
155 #endif
156 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_C
port C
Definition: periph_cpu.h:48
@ PORT_A
port A
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:39
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF6
use alternate function 6
Definition: cpu_gpio.h:107
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition: periph_cpu.h:362
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
#define CLOCK_APB1
Half AHB clock.
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
Timer device configuration.
Definition: periph_cpu.h:263
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218