periph_conf.h
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1 /*
2  * Copyright (C) 2024 ML!PA Consulting GmbH
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
22 #include "periph_cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 #ifndef CLOCK_CORECLOCK
33 #define CLOCK_CORECLOCK MHZ(120)
34 #endif
41 #define EXTERNAL_OSC32_SOURCE 1
42 #define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
49 #define USE_VREG_BUCK (1)
50 
55 static const tc32_conf_t timer_config[] = {
56  { /* Timer 0 - System Clock */
57  .dev = TC0,
58  .irq = TC0_IRQn,
59  .mclk = &MCLK->APBAMASK.reg,
60  .mclk_mask = MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1,
61  .gclk_id = TC0_GCLK_ID,
62  .gclk_src = SAM0_GCLK_TIMER,
63  .flags = TC_CTRLA_MODE_COUNT32,
64  },
65  { /* Timer 1 */
66  .dev = TC2,
67  .irq = TC2_IRQn,
68  .mclk = &MCLK->APBBMASK.reg,
69  .mclk_mask = MCLK_APBBMASK_TC2 | MCLK_APBBMASK_TC3,
70  .gclk_id = TC2_GCLK_ID,
71  .gclk_src = SAM0_GCLK_TIMER,
72  .flags = TC_CTRLA_MODE_COUNT32,
73  }
74 };
75 
76 /* Timer 0 configuration */
77 #define TIMER_0_CHANNELS 2
78 #define TIMER_0_ISR isr_tc0
79 
80 /* Timer 1 configuration */
81 #define TIMER_1_CHANNELS 2
82 #define TIMER_1_ISR isr_tc2
83 
84 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
92 static const can_conf_t candev_conf[] = {
93  {
94  .can = CAN0,
95  .rx_pin = GPIO_PIN(PA, 22),
96  .tx_pin = GPIO_PIN(PB, 23),
97  .gclk_src = SAM0_GCLK_PERIPH,
98  },
99  {
100  .can = CAN1,
101  .rx_pin = GPIO_PIN(PB, 15),
102  .tx_pin = GPIO_PIN(PB, 14),
103  .gclk_src = SAM0_GCLK_PERIPH,
104  }
105 };
106 
108 #define ISR_CAN0 isr_can0
109 
111 #define ISR_CAN1 isr_can1
112 
114 #define CAN_NUMOF ARRAY_SIZE(candev_conf)
121 static const uart_conf_t uart_config[] = {
122  { /* Virtual COM Port */
123  .dev = &SERCOM5->USART,
124  .rx_pin = GPIO_PIN(PB, 16),
125  .tx_pin = GPIO_PIN(PB, 17),
126  .mux = GPIO_MUX_C,
127  .rx_pad = UART_PAD_RX_1,
128  .tx_pad = UART_PAD_TX_0,
129  .flags = UART_FLAG_NONE,
130  .gclk_src = SAM0_GCLK_PERIPH,
131  },
132  { /* shared with CAN1 */
133  .dev = &SERCOM4->USART,
134  .rx_pin = GPIO_PIN(PB, 13),
135  .tx_pin = GPIO_PIN(PB, 12),
136 #ifdef MODULE_PERIPH_UART_HW_FC
137  .rts_pin = GPIO_PIN(PB, 14),
138  .cts_pin = GPIO_PIN(PB, 15),
139 #endif
140  .mux = GPIO_MUX_C,
141  .rx_pad = UART_PAD_RX_1,
142 #ifdef MODULE_PERIPH_UART_HW_FC
143  .tx_pad = UART_PAD_TX_0_RTS_2_CTS_3,
144 #else
145  .tx_pad = UART_PAD_TX_0,
146 #endif
147  .flags = UART_FLAG_NONE,
148  .gclk_src = SAM0_GCLK_PERIPH,
149  },
150  {
151  .dev = &SERCOM0->USART,
152  .rx_pin = GPIO_PIN(PA, 9),
153  .tx_pin = GPIO_PIN(PA, 8),
154 #ifdef MODULE_PERIPH_UART_HW_FC
155  .rts_pin = GPIO_PIN(PA, 10),
156  .cts_pin = GPIO_PIN(PA, 10),
157 #endif
158  .mux = GPIO_MUX_C,
159  .rx_pad = UART_PAD_RX_1,
160 #ifdef MODULE_PERIPH_UART_HW_FC
161  .tx_pad = UART_PAD_TX_0_RTS_2_CTS_3,
162 #else
163  .tx_pad = UART_PAD_TX_0,
164 #endif
165  .flags = UART_FLAG_NONE,
166  .gclk_src = SAM0_GCLK_PERIPH,
167  },
168  { /* shared with CAN0 */
169  .dev = &SERCOM3->USART,
170  .rx_pin = GPIO_PIN(PA, 23),
171  .tx_pin = GPIO_PIN(PA, 22),
172  .mux = GPIO_MUX_C,
173  .rx_pad = UART_PAD_RX_1,
174  .tx_pad = UART_PAD_TX_0,
175  .flags = UART_FLAG_NONE,
176  .gclk_src = SAM0_GCLK_PERIPH,
177  }
178 };
179 
180 /* interrupt function name mapping */
181 #define UART_0_ISR isr_sercom5_2
182 #define UART_0_ISR_TX isr_sercom5_0
183 
184 #define UART_1_ISR isr_sercom4_2
185 #define UART_1_ISR_TX isr_sercom4_0
186 
187 #define UART_2_ISR isr_sercom0_2
188 #define UART_2_ISR_TX isr_sercom0_0
189 
190 #define UART_3_ISR isr_sercom3_2
191 #define UART_3_ISR_TX isr_sercom3_0
192 
193 #define UART_NUMOF ARRAY_SIZE(uart_config)
201 /* PWM0 channels */
202 static const pwm_conf_chan_t pwm_chan0_config[] = {
203  /* GPIO pin, MUX value, TCC channel */
204  {
205  .pin = GPIO_PIN(PA, 14), /* LED0 */
206  .mux = GPIO_MUX_F,
207  .chan = 0,
208  },
209 };
210 
211 /* PWM device configuration */
212 static const pwm_conf_t pwm_config[] = {
213  {
214  .tim = TCC_CONFIG(TCC2),
215  .chan = pwm_chan0_config,
216  .chan_numof = ARRAY_SIZE(pwm_chan0_config),
217  .gclk_src = SAM0_GCLK_48MHZ,
218  },
219 };
220 
221 /* number of devices that are actually defined */
222 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
229 static const spi_conf_t spi_config[] = {
230  {
231  .dev = &SERCOM1->SPI,
232  .miso_pin = GPIO_PIN(PA, 19),
233  .mosi_pin = GPIO_PIN(PA, 16),
234  .clk_pin = GPIO_PIN(PA, 27),
235  .miso_mux = GPIO_MUX_C,
236  .mosi_mux = GPIO_MUX_C,
237  .clk_mux = GPIO_MUX_C,
238  .miso_pad = SPI_PAD_MISO_3,
239  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
240  .gclk_src = SAM0_GCLK_PERIPH,
241 #ifdef MODULE_PERIPH_DMA
242  .tx_trigger = SERCOM1_DMAC_ID_TX,
243  .rx_trigger = SERCOM1_DMAC_ID_RX,
244 #endif
245 
246  },
247 };
248 
249 #define SPI_NUMOF ARRAY_SIZE(spi_config)
256 static const i2c_conf_t i2c_config[] = {
257  {
258  .dev = &SERCOM2->I2CM,
259  .speed = I2C_SPEED_NORMAL,
260  .scl_pin = GPIO_PIN(PA, 13),
261  .sda_pin = GPIO_PIN(PA, 12),
262  .mux = GPIO_MUX_C,
263  .gclk_src = SAM0_GCLK_PERIPH,
264  .flags = I2C_FLAG_NONE
265  },
266 };
267 
268 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
275 #ifndef RTT_FREQUENCY
276 #define RTT_FREQUENCY (32768U)
277 #endif
286 static const sam0_common_usb_config_t sam_usbdev_config[] = {
287  {
288  .dm = GPIO_PIN(PA, 24),
289  .dp = GPIO_PIN(PA, 25),
290  .d_mux = GPIO_MUX_H,
291  .device = &USB->DEVICE,
292  .gclk_src = SAM0_GCLK_PERIPH,
293  }
294 };
302 /* ADC Default values */
303 #define ADC_GCLK_SRC SAM0_GCLK_PERIPH
304 #define ADC_PRESCALER ADC_CTRLA_PRESCALER_DIV8
305 
306 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
307 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1
308 
309 static const adc_conf_chan_t adc_channels[] = {
310  /* inputctrl, dev */
311  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA07, .dev = ADC0 },
312  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA04, .dev = ADC0 },
313  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PB09, .dev = ADC0 },
314  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA11, .dev = ADC0 },
315  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA10, .dev = ADC0 },
316  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PB08, .dev = ADC0 },
317  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PB03, .dev = ADC0 },
318  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA02, .dev = ADC0 },
319  { .inputctrl = ADC1_INPUTCTRL_MUXPOS_PB04, .dev = ADC1 },
320  { .inputctrl = ADC1_INPUTCTRL_MUXPOS_PB05, .dev = ADC1 },
321  { .inputctrl = ADC1_INPUTCTRL_MUXPOS_PB06, .dev = ADC1 },
322  { .inputctrl = ADC1_INPUTCTRL_MUXPOS_PB07, .dev = ADC1 },
323  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PB01, .dev = ADC0 },
324  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PB00, .dev = ADC0 },
325  { .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA03, .dev = ADC0 },
326 };
327 
328 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
335  /* Must not exceed 12 MHz */
336 #define DAC_CLOCK SAM0_GCLK_TIMER
337  /* Use external reference voltage on PA03 */
338  /* (You have to manually connect PA03 with Vcc) */
339  /* Internal reference only gives 1V */
340 #define DAC_VREF DAC_CTRLB_REFSEL_VREFPU
343 #ifdef __cplusplus
344 }
345 #endif
346 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:39
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:221
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: container.h:82
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
@ UART_PAD_RX_1
select pad 1
@ PB
port B
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_3
use pad 3 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_0_RTS_2_CTS_3
TX is pad 0, on top RTS on pad 2 and CTS on pad 3.
@ UART_PAD_TX_0
select pad 0
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_H
select peripheral function H
@ GPIO_MUX_C
select peripheral function C
@ GPIO_MUX_F
select peripheral function F
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK
#define ADC0_INPUTCTRL_MUXPOS_PA04
Alias for AIN4.
Definition: periph_cpu.h:129
#define ADC0_INPUTCTRL_MUXPOS_PA07
Alias for AIN7.
Definition: periph_cpu.h:132
#define ADC0_INPUTCTRL_MUXPOS_PA10
Alias for AIN10.
Definition: periph_cpu.h:135
#define ADC1_INPUTCTRL_MUXPOS_PB05
Alias for AIN7.
Definition: periph_cpu.h:149
#define ADC1_INPUTCTRL_MUXPOS_PB04
Alias for AIN6.
Definition: periph_cpu.h:148
#define ADC0_INPUTCTRL_MUXPOS_PB01
Alias for AIN13.
Definition: periph_cpu.h:138
#define ADC0_INPUTCTRL_MUXPOS_PB03
Alias for AIN15.
Definition: periph_cpu.h:140
#define ADC0_INPUTCTRL_MUXPOS_PB08
Alias for AIN2.
Definition: periph_cpu.h:127
#define ADC0_INPUTCTRL_MUXPOS_PA11
Alias for AIN11.
Definition: periph_cpu.h:136
#define ADC0_INPUTCTRL_MUXPOS_PB00
Alias for AIN12.
Definition: periph_cpu.h:137
#define ADC1_INPUTCTRL_MUXPOS_PB07
Alias for AIN9.
Definition: periph_cpu.h:151
#define ADC0_INPUTCTRL_MUXPOS_PA03
Alias for AIN1.
Definition: periph_cpu.h:126
#define ADC0_INPUTCTRL_MUXPOS_PB09
Alias for AIN3.
Definition: periph_cpu.h:128
#define ADC0_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition: periph_cpu.h:125
#define SAM0_GCLK_PERIPH
12-48 MHz (DFLL) clock
Definition: periph_cpu.h:81
#define ADC1_INPUTCTRL_MUXPOS_PB06
Alias for AIN8.
Definition: periph_cpu.h:150
@ SAM0_GCLK_TIMER
4/8MHz clock for timers
Definition: periph_cpu.h:70
@ SAM0_GCLK_48MHZ
48MHz clock
Definition: periph_cpu.h:72
ADC Channel Configuration.
ESP CAN device configuration.
Definition: can_esp.h:87
Linux candev configuration.
Definition: candev_linux.h:46
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
PWM channel configuration data structure.
gpio_t pin
GPIO pin.
PWM device configuration.
tc_tcc_cfg_t tim
timer configuration
USB peripheral parameters.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218