periph_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
9 #pragma once
10 
21 /* This board provides an HSE */
22 #ifndef CONFIG_BOARD_HAS_HSE
23 #define CONFIG_BOARD_HAS_HSE 1
24 #endif
25 
26 #include "periph_cpu.h"
27 #include "clk_conf.h"
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
37 static const timer_conf_t timer_config[] = {
38  {
39  .dev = TIM2,
40  .max = 0xffffffff,
41  .rcc_mask = RCC_APB1ENR_TIM2EN,
42  .bus = APB1,
43  .irqn = TIM2_IRQn
44  }
45 };
46 
47 #define TIMER_0_ISR isr_tim2
48 
49 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
56 static const uart_conf_t uart_config[] = {
57  {
58  .dev = USART1,
59  .rcc_mask = RCC_APB2ENR_USART1EN,
60  .rx_pin = GPIO_PIN(PORT_B, 7),
61  .tx_pin = GPIO_PIN(PORT_B, 6),
62  .rx_af = GPIO_AF0,
63  .tx_af = GPIO_AF0,
64  .bus = APB2,
65  .irqn = USART1_IRQn,
66  },
67  {
68  .dev = USART2,
69  .rcc_mask = RCC_APB1ENR_USART2EN,
70  .rx_pin = GPIO_PIN(PORT_A, 3),
71  .tx_pin = GPIO_PIN(PORT_A, 2),
72  .rx_af = GPIO_AF1,
73  .tx_af = GPIO_AF1,
74  .bus = APB1,
75  .irqn = USART2_IRQn
76  }
77 };
78 
79 #define UART_0_ISR (isr_usart1)
80 #define UART_1_ISR (isr_usart2)
81 
82 #define UART_NUMOF ARRAY_SIZE(uart_config)
92 static const adc_conf_t adc_config[] = {
93  { GPIO_PIN(PORT_C, 0), 10 },
94  { GPIO_PIN(PORT_C, 1), 11 },
95  { GPIO_PIN(PORT_C, 2), 12 },
96  { GPIO_PIN(PORT_C, 3), 13 },
97  { GPIO_PIN(PORT_C, 4), 14 },
98  { GPIO_PIN(PORT_C, 5), 15 },
99  { GPIO_UNDEF, 18 }, /* VBAT */
100 };
101 
102 #define VBAT_ADC ADC_LINE(6)
103 #define ADC_NUMOF ARRAY_SIZE(adc_config)
110 static const spi_conf_t spi_config[] = {
111  {
112  .dev = SPI1,
113  .mosi_pin = GPIO_PIN(PORT_A, 7),
114  .miso_pin = GPIO_PIN(PORT_A, 6),
115  .sclk_pin = GPIO_PIN(PORT_A, 5),
116  .cs_pin = SPI_CS_UNDEF,
117  .mosi_af = GPIO_AF0,
118  .miso_af = GPIO_AF0,
119  .sclk_af = GPIO_AF0,
120  .cs_af = GPIO_AF0,
121  .rccmask = RCC_APB2ENR_SPI1EN,
122  .apbbus = APB2
123  },
124  {
125  .dev = SPI2,
126  .mosi_pin = GPIO_PIN(PORT_B, 15),
127  .miso_pin = GPIO_PIN(PORT_B, 14),
128  .sclk_pin = GPIO_PIN(PORT_B, 13),
129  .cs_pin = SPI_CS_UNDEF,
130  .mosi_af = GPIO_AF0,
131  .miso_af = GPIO_AF0,
132  .sclk_af = GPIO_AF0,
133  .cs_af = GPIO_AF0,
134  .rccmask = RCC_APB1ENR_SPI2EN,
135  .apbbus = APB1
136  }
137 };
138 
139 #define SPI_NUMOF ARRAY_SIZE(spi_config)
142 #ifdef __cplusplus
143 }
144 #endif
145 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_C
port C
Definition: periph_cpu.h:48
@ PORT_A
port A
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:39
static const adc_conf_t adc_config[]
ADC configuration.
Definition: periph_conf.h:250
@ GPIO_AF1
use alternate function 1
Definition: cpu_gpio.h:102
@ GPIO_AF0
use alternate function 0
Definition: cpu_gpio.h:101
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition: periph_cpu.h:362
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
ADC device configuration.
Definition: periph_cpu.h:377
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
Timer device configuration.
Definition: periph_cpu.h:263
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218