26 #if defined(CAN_INST_NUM)
29 # ifndef CANDEV_SAMD5X_DEFAULT_BITRATE
33 # define CANDEV_SAMD5X_DEFAULT_BITRATE 500000U
36 # ifndef CANDEV_SAMD5X_DEFAULT_SPT
38 # define CANDEV_SAMD5X_DEFAULT_SPT 875
41 # ifndef CANDEV_SAMD5X_DEFAULT_STD_FILTER_NUM
42 # define CANDEV_SAMD5X_DEFAULT_STD_FILTER_NUM 3
45 # ifndef CANDEV_SAMD5X_DEFAULT_EXT_FILTER_NUM
46 # define CANDEV_SAMD5X_DEFAULT_EXT_FILTER_NUM 3
49 # ifndef CANDEV_SAMD5X_DEFAULT_RX_FIFO_0_ELTS_NUM
50 # define CANDEV_SAMD5X_DEFAULT_RX_FIFO_0_ELTS_NUM 32
53 # ifndef CANDEV_SAMD5X_DEFAULT_RX_FIFO_1_ELTS_NUM
54 # define CANDEV_SAMD5X_DEFAULT_RX_FIFO_1_ELTS_NUM 32
57 # ifndef CANDEV_SAMD5X_DEFAULT_TX_EVT_FIFO_ELTS_NUM
58 # define CANDEV_SAMD5X_DEFAULT_TX_EVT_FIFO_ELTS_NUM 16
61 # ifndef CANDEV_SAMD5X_DEFAULT_TX_BUFFER_NUM
62 # define CANDEV_SAMD5X_DEFAULT_TX_BUFFER_NUM 16
65 # ifndef CANDEV_SAMD5X_DEFAULT_TX_BUFFER_FIFO_QUEUE_NUM
66 # define CANDEV_SAMD5X_DEFAULT_TX_BUFFER_FIFO_QUEUE_NUM 16
70 # define CANDEV_SAMD5X_MAX_STD_FILTER 128
71 # define CANDEV_SAMD5X_MAX_EXT_FILTER 64
72 # define CANDEV_SAMD5X_MAX_RX_FIFO_0_ELTS 64
73 # define CANDEV_SAMD5X_MAX_RX_FIFO_1_ELTS 64
74 # define CANDEV_SAMD5X_MAX_RX_BUFFER 64
75 # define CANDEV_SAMD5X_MAX_TX_EVT_FIFO_ELTS 32
76 # define CANDEV_SAMD5X_MAX_TX_BUFFER 32
77 # define CANDEV_SAMD5X_MSG_RAM_MAX_SIZE 448
80 # define CANDEV_SAMD5X_NO_ERROR 0
81 # define CANDEV_SAMD5X_STUFF_ERROR 1
82 # define CANDEV_SAMD5X_FORM_ERROR 2
83 # define CANDEV_SAMD5X_ACK_ERROR 3
84 # define CANDEV_SAMD5X_BIT1_ERROR 4
85 # define CANDEV_SAMD5X_BIT0_ERROR 5
86 # define CANDEV_SAMD5X_CRC_ERROR 6
87 # define CANDEV_SAMD5X_NO_CHANGE_ERROR 7
114 bool enable_pin_active_low : 1;
122 bool disable_automatic_retransmission : 1;
132 bool enable_transmit_pause : 1;
139 bool start_in_monitor_mode : 1;
141 # define HAVE_CAN_CONF_T
146 typedef struct can_msg_ram {
148 CanMramSidfe std_filter[CANDEV_SAMD5X_DEFAULT_STD_FILTER_NUM];
150 CanMramXifde ext_filter[CANDEV_SAMD5X_DEFAULT_EXT_FILTER_NUM];
152 CanMramRxf0e rx_fifo_0[CANDEV_SAMD5X_DEFAULT_RX_FIFO_0_ELTS_NUM];
154 CanMramRxf1e rx_fifo_1[CANDEV_SAMD5X_DEFAULT_RX_FIFO_1_ELTS_NUM];
156 CanMramRxbe rx_buffer[CANDEV_SAMD5X_MAX_RX_BUFFER];
158 CanMramTxefe tx_event_fifo[CANDEV_SAMD5X_DEFAULT_TX_EVT_FIFO_ELTS_NUM];
160 CanMramTxbe tx_buffer[CANDEV_SAMD5X_DEFAULT_TX_BUFFER_FIFO_QUEUE_NUM];
173 uint8_t last_error_code;
174 uint8_t d_last_error_code;
175 uint8_t tx_error_count;
176 uint8_t rx_error_count;
179 can_msg_ram_t msg_ram;
191 void candev_samd5x_tdc_control(
can_t *dev);
Definitions for low-level CAN driver interface.
struct can can_t
Low level device structure for ESP32 CAN (extension of candev_t)
gpio_mode_t
Available pin modes.
struct candev_conf can_conf_t
Linux candev configuration.
ESP CAN device configuration.
Low level device structure for ESP32 CAN (extension of candev_t)
Structure to hold driver state.