cfg_timer_default.h
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1 /*
2  * Copyright (C) 2016 Kees Bakker, SODAQ
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
21 #include <stdint.h>
22 
23 #include "cpu.h"
24 #include "periph_cpu.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
34 static const tc32_conf_t timer_config[] = {
35  { /* Timer 0 - System Clock */
36  .dev = TC3,
37  .irq = TC3_IRQn,
38  .pm_mask = PM_APBCMASK_TC3,
39  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
40 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
41  .gclk_src = SAM0_GCLK_1MHZ,
42 #else
43  .gclk_src = SAM0_GCLK_MAIN,
44 #endif
45  .flags = TC_CTRLA_MODE_COUNT16,
46  },
47  { /* Timer 1 */
48  .dev = TC4,
49  .irq = TC4_IRQn,
50  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
51  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
52 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
53  .gclk_src = SAM0_GCLK_1MHZ,
54 #else
55  .gclk_src = SAM0_GCLK_MAIN,
56 #endif
57  .flags = TC_CTRLA_MODE_COUNT32,
58  }
59 };
60 
61 #define TIMER_0_MAX_VALUE 0xffff
62 
63 /* interrupt function name mapping */
64 #define TIMER_0_ISR isr_tc3
65 #define TIMER_1_ISR isr_tc4
66 
67 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
70 #ifdef __cplusplus
71 }
72 #endif
73 
static const timer_conf_t timer_config[]
Configuration of the exposed timers.
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition: periph_cpu.h:75
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:73
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264