71a8124986bb4bb393099f0f36225879/doc-preview/tcs37727-internal_8h_source.html

/*

 * Copyright (C) 2015 PHYTEC Messtechnik GmbH

 *

 * This file is subject to the terms and conditions of the GNU Lesser

 * General Public License v2.1. See the file LICENSE in the top level

 * directory for more details.

 *

 */


#pragma once


#ifdef __cplusplus

extern "C"

{

#endif


#ifndef TCS37727_AG_THRESHOLD_LOW

#define TCS37727_AG_THRESHOLD_LOW       200

#endif


#ifndef TCS37727_AG_THRESHOLD_HIGH

#define TCS37727_AG_THRESHOLD_HIGH      (65535 - TCS37727_AG_THRESHOLD_LOW)

#endif


#define TCS37727_ENABLE             0x80

#define TCS37727_ATIME              0x81

#define TCS37727_PTIME              0x82

#define TCS37727_WTIME              0x83

#define TCS37727_AILTL              0x04

#define TCS37727_AILTH              0x05

#define TCS37727_AIHTL              0x06

#define TCS37727_AIHTH              0x07

#define TCS37727_PILTL              0x08

#define TCS37727_PILTH              0x09

#define TCS37727_PIHTL              0x0A

#define TCS37727_PIHTH              0x0B

#define TCS37727_PERS               0x8C

#define TCS37727_CONFIG             0x8D

#define TCS37727_PPULSE             0x8E

#define TCS37727_CONTROL            0x8F

#define TCS37727_ID                 0x92

#define TCS37727_STATUS             0x93

#define TCS37727_CDATA              0x14

#define TCS37727_CDATAH             0x15

#define TCS37727_RDATA              0x16

#define TCS37727_RDATAH             0x17

#define TCS37727_GDATA              0x18

#define TCS37727_GDATAH             0x19

#define TCS37727_BDATA              0x1A

#define TCS37727_BDATAH             0x1B

#define TCS37727_PDATA              0x1C

#define TCS37727_PDATAH             0x1D

#define TCS37727_BYTE_TRANS         0x80

#define TCS37727_INC_TRANS          0xA0

#define TCS37727_SF_PICLR           0xE5

#define TCS37727_SF_CICLR           0xE6

#define TCS37727_SF_PCICLR          0xE7

#define TCS37727_ENABLE_PIEN        (1 << 5)

#define TCS37727_ENABLE_AIEN        (1 << 4)

#define TCS37727_ENABLE_WEN         (1 << 3)

#define TCS37727_ENABLE_PEN         (1 << 2)

#define TCS37727_ENABLE_AEN         (1 << 1)

#define TCS37727_ENABLE_PON         (1 << 0)

#define TCS37727_CONTROL_PDRIVE_100     0x00

#define TCS37727_CONTROL_PDRIVE_50      0x04

#define TCS37727_CONTROL_PDRIVE_25      0x08

#define TCS37727_CONTROL_PDRIVE_12      0x0C

#define TCS37727_CONTROL_PDRIVE_MASK    0x0C

#define TCS37727_CONTROL_AGAIN_1        0x00

#define TCS37727_CONTROL_AGAIN_4        0x01

#define TCS37727_CONTROL_AGAIN_16       0x02

#define TCS37727_CONTROL_AGAIN_60       0x03

#define TCS37727_CONTROL_AGAIN_MASK     0x03

#define TCS37727_ID_VALUE           0x49

#define TCS37727_ATIME_MIN          2400    /* 2.4ms integration time, max count 1024 */

#define TCS37727_ATIME_MAX          614000  /* 614ms integration time, max count 0xffff */


#define TCS37727_ATIME_TO_REG(val)  (256 - (uint8_t)((val) / 2400))

#define TCS37727_ATIME_TO_US(reg)   ((256 - (uint8_t)(reg)) * 2400)

#define DGF_IF                      310

#define R_COEF_IF                   136

#define G_COEF_IF                   1000

#define B_COEF_IF                   -444

#define CT_COEF_IF                  3810

#define CT_OFFSET_IF                1391

#ifdef __cplusplus

}

#endif