20 #ifndef CANDEV_SAMD5X_H
21 #define CANDEV_SAMD5X_H
27 #if defined(CAN_INST_NUM)
30 #ifndef CANDEV_SAMD5X_DEFAULT_BITRATE
34 #define CANDEV_SAMD5X_DEFAULT_BITRATE 500000U
37 #ifndef CANDEV_SAMD5X_DEFAULT_SPT
39 #define CANDEV_SAMD5X_DEFAULT_SPT 875
42 #ifndef CANDEV_SAMD5X_DEFAULT_STD_FILTER_NUM
43 #define CANDEV_SAMD5X_DEFAULT_STD_FILTER_NUM 3
46 #ifndef CANDEV_SAMD5X_DEFAULT_EXT_FILTER_NUM
47 #define CANDEV_SAMD5X_DEFAULT_EXT_FILTER_NUM 3
50 #ifndef CANDEV_SAMD5X_DEFAULT_RX_FIFO_0_ELTS_NUM
51 #define CANDEV_SAMD5X_DEFAULT_RX_FIFO_0_ELTS_NUM 32
54 #ifndef CANDEV_SAMD5X_DEFAULT_RX_FIFO_1_ELTS_NUM
55 #define CANDEV_SAMD5X_DEFAULT_RX_FIFO_1_ELTS_NUM 32
58 #ifndef CANDEV_SAMD5X_DEFAULT_TX_EVT_FIFO_ELTS_NUM
59 #define CANDEV_SAMD5X_DEFAULT_TX_EVT_FIFO_ELTS_NUM 16
62 #ifndef CANDEV_SAMD5X_DEFAULT_TX_BUFFER_NUM
63 #define CANDEV_SAMD5X_DEFAULT_TX_BUFFER_NUM 16
66 #ifndef CANDEV_SAMD5X_DEFAULT_TX_BUFFER_FIFO_QUEUE_NUM
67 #define CANDEV_SAMD5X_DEFAULT_TX_BUFFER_FIFO_QUEUE_NUM 16
71 #define CANDEV_SAMD5X_MAX_STD_FILTER 128
72 #define CANDEV_SAMD5X_MAX_EXT_FILTER 64
73 #define CANDEV_SAMD5X_MAX_RX_FIFO_0_ELTS 64
74 #define CANDEV_SAMD5X_MAX_RX_FIFO_1_ELTS 64
75 #define CANDEV_SAMD5X_MAX_RX_BUFFER 64
76 #define CANDEV_SAMD5X_MAX_TX_EVT_FIFO_ELTS 32
77 #define CANDEV_SAMD5X_MAX_TX_BUFFER 32
78 #define CANDEV_SAMD5X_MSG_RAM_MAX_SIZE 448
81 #define CANDEV_SAMD5X_NO_ERROR 0
82 #define CANDEV_SAMD5X_STUFF_ERROR 1
83 #define CANDEV_SAMD5X_FORM_ERROR 2
84 #define CANDEV_SAMD5X_ACK_ERROR 3
85 #define CANDEV_SAMD5X_BIT1_ERROR 4
86 #define CANDEV_SAMD5X_BIT0_ERROR 5
87 #define CANDEV_SAMD5X_CRC_ERROR 6
88 #define CANDEV_SAMD5X_NO_CHANGE_ERROR 7
115 bool enable_pin_active_low : 1;
123 bool disable_automatic_retransmission : 1;
133 bool enable_transmit_pause : 1;
140 bool start_in_monitor_mode : 1;
142 #define HAVE_CAN_CONF_T
149 CanMramSidfe std_filter[CANDEV_SAMD5X_DEFAULT_STD_FILTER_NUM];
151 CanMramXifde ext_filter[CANDEV_SAMD5X_DEFAULT_EXT_FILTER_NUM];
153 CanMramRxf0e rx_fifo_0[CANDEV_SAMD5X_DEFAULT_RX_FIFO_0_ELTS_NUM];
155 CanMramRxf1e rx_fifo_1[CANDEV_SAMD5X_DEFAULT_RX_FIFO_1_ELTS_NUM];
157 CanMramRxbe rx_buffer[CANDEV_SAMD5X_MAX_RX_BUFFER];
159 CanMramTxefe tx_event_fifo[CANDEV_SAMD5X_DEFAULT_TX_EVT_FIFO_ELTS_NUM];
161 CanMramTxbe tx_fifo_queue[CANDEV_SAMD5X_DEFAULT_TX_BUFFER_FIFO_QUEUE_NUM];
173 msg_ram_conf_t msg_ram_conf;
177 bool tx_fifo_queue_ctrl;
187 void candev_samd5x_tdc_control(
can_t *dev);
Definitions for low-level CAN driver interface.
struct can can_t
Low level device structure for ESP32 CAN (extension of candev_t)
gpio_mode_t
Available pin modes.
struct candev_conf can_conf_t
Linux candev configuration.
ESP CAN device configuration.
Low level device structure for ESP32 CAN (extension of candev_t)
Structure to hold driver state.