cfg_clock_32_1.h
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1 /*
2  * SPDX-FileCopyrightText: 2018 Inria
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
19 #ifdef __cplusplus
20 extern "C" {
21 #endif
22 
30 #define CLOCK_HFCLK (32U) /* set to 0: internal RC oscillator
31  * 32: 32MHz crystal */
32 /* LFCLK Source clock selection:*/
33 /* - CLOCK_LFCLKSRC_SRC_RC: internal RC oscillator
34  * - CLOCK_LFCLKSRC_SRC_Xtal: 32.768 kHz crystal
35  * - CLOCK_LFCLKSRC_SRC_Synth: derived from HFCLK */
36 #define CLOCK_LFCLK (CLOCK_LFCLKSRC_SRC_Xtal)
39 #ifdef __cplusplus
40 }
41 #endif
42