cfg_timer_tim5.h
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1 /*
2  * SPDX-FileCopyrightText: 2019 Inria
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 #include "periph_cpu.h"
19 
20 #ifdef __cplusplus
21 extern "C" {
22 #endif
23 
28 static const timer_conf_t timer_config[] = {
29  {
30  .dev = TIM5,
31  .max = 0xffffffff,
32 #if defined(RCC_APB1ENR1_TIM5EN)
33  .rcc_mask = RCC_APB1ENR1_TIM5EN,
34 #else
35  .rcc_mask = RCC_APB1ENR_TIM5EN,
36 #endif
37  .bus = APB1,
38  .irqn = TIM5_IRQn
39  }
40 };
41 
42 #define TIMER_0_ISR isr_tim5
43 
44 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
47 #ifdef __cplusplus
48 }
49 #endif
50 
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
Timer device configuration.
Definition: periph_cpu.h:263
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264