periph_conf_common.h
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1 /*
2  * SPDX-FileCopyrightText: 2014 Freie Universität Berlin
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
19 /* iotlab boards provide an LSE */
20 #ifndef CONFIG_BOARD_HAS_LSE
21 #define CONFIG_BOARD_HAS_LSE 1
22 #endif
23 
24 /* HSE is clocked at 16MHz */
25 #ifndef CONFIG_BOARD_HAS_HSE
26 #define CONFIG_BOARD_HAS_HSE 1
27 #endif
28 
29 #ifndef CONFIG_CLOCK_HSE
30 #define CONFIG_CLOCK_HSE MHZ(16)
31 #endif
32 
33 #include "periph_cpu.h"
34 #include "clk_conf.h"
35 
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39 
44 static const adc_conf_t adc_config[] = {
45  { GPIO_PIN(PORT_A,3), 0, 3 },
46  { GPIO_UNDEF , 0, 16 },
47  { GPIO_UNDEF , 0, 17 }
48 };
49 
50 #define ADC_NUMOF ARRAY_SIZE(adc_config)
57 static const dma_conf_t dma_config[] = {
58  { .stream = 3 }, /* DMA1 Channel 4 - USART1_TX */
59  { .stream = 5 }, /* DMA1 Channel 6 - USART2_TX */
60 };
61 
62 #define DMA_0_ISR isr_dma1_channel4
63 #define DMA_1_ISR isr_dma1_channel6
64 
65 #define DMA_NUMOF ARRAY_SIZE(dma_config)
72 static const timer_conf_t timer_config[] = {
73  {
74  .dev = TIM2,
75  .max = 0x0000ffff,
76  .rcc_mask = RCC_APB1ENR_TIM2EN,
77  .bus = APB1,
78  .irqn = TIM2_IRQn
79  },
80  {
81  .dev = TIM3,
82  .max = 0x0000ffff,
83  .rcc_mask = RCC_APB1ENR_TIM3EN,
84  .bus = APB1,
85  .irqn = TIM3_IRQn
86  }
87 };
88 
89 #define TIMER_0_ISR isr_tim2
90 #define TIMER_1_ISR isr_tim3
91 
92 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
99 static const uart_conf_t uart_config[] = {
100  {
101  .dev = USART1,
102  .rcc_mask = RCC_APB2ENR_USART1EN,
103  .rx_pin = GPIO_PIN(PORT_A, 10),
104  .tx_pin = GPIO_PIN(PORT_A, 9),
105  .bus = APB2,
106  .irqn = USART1_IRQn,
107 #ifdef MODULE_PERIPH_DMA
108  .dma = 0,
109  .dma_chan = 2
110 #endif
111  },
112  {
113  .dev = USART2,
114  .rcc_mask = RCC_APB1ENR_USART2EN,
115  .rx_pin = GPIO_PIN(PORT_A, 3),
116  .tx_pin = GPIO_PIN(PORT_A, 2),
117  .bus = APB1,
118  .irqn = USART2_IRQn,
119 #ifdef MODULE_PERIPH_DMA
120  .dma = 1,
121  .dma_chan = 2
122 #endif
123  }
124 };
125 
126 #define UART_0_ISR (isr_usart1)
127 #define UART_1_ISR (isr_usart2)
128 
129 #define UART_NUMOF ARRAY_SIZE(uart_config)
136 #ifndef RTT_FREQUENCY
137 #define RTT_FREQUENCY (RTT_MAX_FREQUENCY) /* in Hz */
138 #endif
145 static const i2c_conf_t i2c_config[] = {
146  {
147  .dev = I2C1,
148  .speed = I2C_SPEED_NORMAL,
149  .scl_pin = GPIO_PIN(PORT_B, 6),
150  .sda_pin = GPIO_PIN(PORT_B, 7),
151  .bus = APB1,
152  .rcc_mask = RCC_APB1ENR_I2C1EN,
153  .clk = CLOCK_APB1,
154  .irqn = I2C1_EV_IRQn
155  }
156 };
157 
158 #define I2C_0_ISR isr_i2c1_ev
159 
160 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
163 #ifdef __cplusplus
164 }
165 #endif
166 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_A
port A
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
Static array with configuration for declared UART devices.
static const i2c_conf_t i2c_config[]
Static array with configuration for declared I2C devices.
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
#define CLOCK_APB1
Half AHB clock.
ADC device configuration.
Definition: periph_cpu.h:377
DMA configuration.
Definition: cpu_dma.h:31
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: cpu_dma.h:54
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
Timer device configuration.
Definition: periph_cpu.h:263
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218