periph_conf.h
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1 /*
2  * Copyright (C) 2020 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
21 /* Add specific clock configuration (HSE, LSE) for this board here */
22 #ifndef CONFIG_BOARD_HAS_LSE
23 #define CONFIG_BOARD_HAS_LSE 1
24 #endif
25 /* This board provides a 24MHz HSE oscillator */
26 #ifndef CONFIG_BOARD_HAS_HSE
27 #define CONFIG_BOARD_HAS_HSE 1
28 #endif
29 /* By default, configure a 80MHz SYSCLK with PLL using HSE as input clock */
30 #ifndef CONFIG_CLOCK_PLL_M
31 #define CONFIG_CLOCK_PLL_M (6)
32 #endif
33 
34 #include "periph_cpu.h"
35 #include "clk_conf.h"
36 #include "cfg_i2c1_pb8_pb9.h"
37 #include "cfg_rtt_default.h"
38 #include "cfg_timer_tim5.h"
39 
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43 
48 static const uart_conf_t uart_config[] = {
49  {
50  .dev = LPUART1,
51  .rcc_mask = RCC_APB1ENR2_LPUART1EN,
52  .rx_pin = GPIO_PIN(PORT_A, 3),
53  .tx_pin = GPIO_PIN(PORT_A, 2),
54  .rx_af = GPIO_AF12,
55  .tx_af = GPIO_AF12,
56  .bus = APB12,
57  .irqn = LPUART1_IRQn,
58  .type = STM32_LPUART,
59  .clk_src = 0, /* Use APB clock */
60  },
61  { /* Connected to Arduino D0/D1 */
62  .dev = USART1,
63  .rcc_mask = RCC_APB2ENR_USART1EN,
64  .rx_pin = GPIO_PIN(PORT_C, 5),
65  .tx_pin = GPIO_PIN(PORT_C, 4),
66  .rx_af = GPIO_AF7,
67  .tx_af = GPIO_AF7,
68  .bus = APB2,
69  .irqn = USART1_IRQn,
70  .type = STM32_USART,
71  .clk_src = 0, /* Use APB clock */
72  },
73 };
74 
75 #define UART_0_ISR (isr_lpuart1)
76 #define UART_1_ISR (isr_usart1)
77 
78 #define UART_NUMOF ARRAY_SIZE(uart_config)
85 static const spi_conf_t spi_config[] = {
86  {
87  .dev = SPI1,
88  .mosi_pin = GPIO_PIN(PORT_A, 7), /* Arduino D11 */
89  .miso_pin = GPIO_PIN(PORT_A, 6), /* Arduino D12 */
90  .sclk_pin = GPIO_PIN(PORT_A, 5), /* Arduino D13 */
91  .cs_pin = GPIO_UNDEF,
92  .mosi_af = GPIO_AF5,
93  .miso_af = GPIO_AF5,
94  .sclk_af = GPIO_AF5,
95  .cs_af = GPIO_AF5,
96  .rccmask = RCC_APB2ENR_SPI1EN,
97  .apbbus = APB2,
98  },
99 };
100 
101 #define SPI_NUMOF ARRAY_SIZE(spi_config)
104 #ifdef __cplusplus
105 }
106 #endif
107 
@ PORT_C
port C
Definition: periph_cpu.h:48
@ PORT_A
port A
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
Common configuration for STM32 I2C.
Common configuration for STM32 Timer peripheral based on TIM5.
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF12
use alternate function 12
Definition: cpu_gpio.h:114
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition: cpu_uart.h:38
@ STM32_USART
STM32 USART module type.
Definition: cpu_uart.h:37
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218