periph_conf.h
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1 /*
2  * Copyright (C) 2020 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
21 /* Add specific clock configuration (HSE, LSE) for this board here */
22 #ifndef CONFIG_BOARD_HAS_LSE
23 #define CONFIG_BOARD_HAS_LSE 1
24 #endif
25 
26 #include "periph_cpu.h"
27 #include "clk_conf.h"
28 #include "cfg_i2c1_pb8_pb9.h"
29 #include "cfg_rtt_default.h"
30 #include "cfg_timer_tim5.h"
31 
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35 
40 static const uart_conf_t uart_config[] = {
41  {
42  .dev = LPUART1,
43  .rcc_mask = RCC_APB1ENR2_LPUART1EN,
44  .rx_pin = GPIO_PIN(PORT_G, 8),
45  .tx_pin = GPIO_PIN(PORT_G, 7),
46  .rx_af = GPIO_AF8,
47  .tx_af = GPIO_AF8,
48  .bus = APB12,
49  .irqn = LPUART1_IRQn,
50  .type = STM32_LPUART,
51  .clk_src = 0, /* Use APB clock */
52  },
53  { /* Connected to Arduino D0/D1 */
54  .dev = USART3,
55  .rcc_mask = RCC_APB1ENR1_USART3EN,
56  .rx_pin = GPIO_PIN(PORT_D, 9),
57  .tx_pin = GPIO_PIN(PORT_D, 8),
58  .rx_af = GPIO_AF7,
59  .tx_af = GPIO_AF7,
60  .bus = APB1,
61  .irqn = USART3_IRQn,
62  .type = STM32_USART,
63  .clk_src = 0, /* Use APB clock */
64  },
65 };
66 
67 #define UART_0_ISR (isr_lpuart1)
68 #define UART_1_ISR (isr_usart3)
69 
70 #define UART_NUMOF ARRAY_SIZE(uart_config)
77 static const spi_conf_t spi_config[] = {
78  {
79  .dev = SPI1,
80  .mosi_pin = GPIO_PIN(PORT_A, 7), /* Arduino D11 */
81  .miso_pin = GPIO_PIN(PORT_A, 6), /* Arduino D12 */
82  .sclk_pin = GPIO_PIN(PORT_A, 5), /* Arduino D13 */
83  .cs_pin = GPIO_UNDEF,
84  .mosi_af = GPIO_AF5,
85  .miso_af = GPIO_AF5,
86  .sclk_af = GPIO_AF5,
87  .cs_af = GPIO_AF5,
88  .rccmask = RCC_APB2ENR_SPI1EN,
89  .apbbus = APB2,
90  },
91 };
92 
93 #define SPI_NUMOF ARRAY_SIZE(spi_config)
111 static const pwm_conf_t pwm_config[] = {
112  {
113  .dev = TIM2,
114  .rcc_mask = RCC_APB1ENR1_TIM2EN,
115  .chan = { { .pin = GPIO_PIN(PORT_A, 0) /* CN10 D32 */, .cc_chan = 0},
116  { .pin = GPIO_PIN(PORT_A, 1) /* CN10 A8 */, .cc_chan = 1},
117  { .pin = GPIO_PIN(PORT_A, 2) /* CN9 A1 */, .cc_chan = 2},
118  { .pin = GPIO_PIN(PORT_A, 3) /* CN9 A0 */, .cc_chan = 3} },
119  .af = GPIO_AF1,
120  .bus = APB1
121  },
122  {
123  .dev = TIM3,
124  .rcc_mask = RCC_APB1ENR1_TIM3EN,
125  .chan = { { .pin = GPIO_PIN(PORT_B, 4) /* CN7 D25 */, .cc_chan = 0},
126  { .pin = GPIO_PIN(PORT_B, 5) /* CN7 D22 */, .cc_chan = 1},
127  { .pin = GPIO_PIN(PORT_B, 0) /* CN9 A3 */, .cc_chan = 2},
128  { .pin = GPIO_PIN(PORT_B, 1) /* CN10 A6 */, .cc_chan = 3} },
129  .af = GPIO_AF2,
130  .bus = APB1
131  },
132  {
133  .dev = TIM4,
134  .rcc_mask = RCC_APB1ENR1_TIM4EN,
135  .chan = { { .pin = GPIO_PIN(PORT_D, 12) /* CN7 D19 */, .cc_chan = 0},
136  { .pin = GPIO_PIN(PORT_B, 7) /* Blue LD2 */, .cc_chan = 1},
137  { .pin = GPIO_PIN(PORT_D, 14) /* CN7 D10 */, .cc_chan = 2},
138  { .pin = GPIO_PIN(PORT_D, 15) /* CN7 D9 */, .cc_chan = 3} },
139  .af = GPIO_AF2,
140  .bus = APB1
141  },
142 };
143 
144 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
145 
148 #ifdef __cplusplus
149 }
150 #endif
151 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_G
port G
Definition: periph_cpu.h:52
@ PORT_A
port A
Definition: periph_cpu.h:46
@ PORT_D
port D
Definition: periph_cpu.h:49
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:221
Common configuration for STM32 I2C.
Common configuration for STM32 Timer peripheral based on TIM5.
@ GPIO_AF1
use alternate function 1
Definition: cpu_gpio.h:102
@ GPIO_AF2
use alternate function 2
Definition: cpu_gpio.h:103
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF8
use alternate function 8
Definition: cpu_gpio.h:110
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition: cpu_uart.h:38
@ STM32_USART
STM32 USART module type.
Definition: cpu_uart.h:37
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218