periph_conf.h
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1 /*
2  * Copyright (C) 2018 HAW Hamburg
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
22 #include <stdint.h>
23 
24 #include "cpu.h"
25 #include "periph_cpu.h"
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
62 #define CLOCK_USE_PLL (1)
63 
64 #if CLOCK_USE_PLL
65 /* edit these values to adjust the PLL output frequency */
66 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
67 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
68 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
69 #else
70 /* edit this value to your needs */
71 #define CLOCK_DIV (1U)
72 /* generate the actual core clock frequency */
73 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
74 #endif
81 static const tc32_conf_t timer_config[] = {
82  { /* Timer 0 - System Clock */
83  .dev = TC3,
84  .irq = TC3_IRQn,
85  .pm_mask = PM_APBCMASK_TC3,
86  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
87 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
88  .gclk_src = SAM0_GCLK_1MHZ,
89 #else
90  .gclk_src = SAM0_GCLK_MAIN,
91 #endif
92  .flags = TC_CTRLA_MODE_COUNT16,
93  },
94  { /* Timer 1 */
95  .dev = TC4,
96  .irq = TC4_IRQn,
97  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
98  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
99 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
100  .gclk_src = SAM0_GCLK_1MHZ,
101 #else
102  .gclk_src = SAM0_GCLK_MAIN,
103 #endif
104  .flags = TC_CTRLA_MODE_COUNT32,
105  }
106 };
107 
108 #define TIMER_0_MAX_VALUE 0xffff
109 
110 /* interrupt function name mapping */
111 #define TIMER_0_ISR isr_tc3
112 #define TIMER_1_ISR isr_tc4
113 
114 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
121 static const uart_conf_t uart_config[] = {
122  {
123  .dev = &SERCOM3->USART,
124  .rx_pin = GPIO_PIN(PA, 23),
125  .tx_pin = GPIO_PIN(PA, 22),
126 #ifdef MODULE_PERIPH_UART_HW_FC
127  .rts_pin = GPIO_UNDEF,
128  .cts_pin = GPIO_UNDEF,
129 #endif
130  .mux = GPIO_MUX_C,
131  .rx_pad = UART_PAD_RX_1,
132  .tx_pad = UART_PAD_TX_0,
133  .flags = UART_FLAG_NONE,
134  .gclk_src = SAM0_GCLK_MAIN,
135  },
136  {
137  .dev = &SERCOM4->USART,
138  .rx_pin = GPIO_PIN(PB, 9),
139  .tx_pin = GPIO_PIN(PB, 8),
140 #ifdef MODULE_PERIPH_UART_HW_FC
141  .rts_pin = GPIO_UNDEF,
142  .cts_pin = GPIO_UNDEF,
143 #endif
144  .mux = GPIO_MUX_D,
145  .rx_pad = UART_PAD_RX_1,
146  .tx_pad = UART_PAD_TX_0,
147  .flags = UART_FLAG_NONE,
148  .gclk_src = SAM0_GCLK_MAIN,
149  }
150 };
151 
152 /* interrupt function name mapping */
153 #define UART_0_ISR isr_sercom3
154 #define UART_1_ISR isr_sercom4
155 
156 #define UART_NUMOF ARRAY_SIZE(uart_config)
163 static const spi_conf_t spi_config[] = {
164  {
165  .dev = &SERCOM1->SPI,
166  .miso_pin = GPIO_PIN(PA, 19),
167  .mosi_pin = GPIO_PIN(PA, 16),
168  .clk_pin = GPIO_PIN(PA, 17),
169  .miso_mux = GPIO_MUX_C,
170  .mosi_mux = GPIO_MUX_C,
171  .clk_mux = GPIO_MUX_C,
172  .miso_pad = SPI_PAD_MISO_3,
173  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
174  .gclk_src = SAM0_GCLK_MAIN,
175 #ifdef MODULE_PERIPH_DMA
176  .tx_trigger = SERCOM1_DMAC_ID_TX,
177  .rx_trigger = SERCOM1_DMAC_ID_RX,
178 #endif
179  }
180 };
181 
182 #define SPI_NUMOF ARRAY_SIZE(spi_config)
189 static const i2c_conf_t i2c_config[] = {
190  {
191  .dev = &(SERCOM0->I2CM),
192  .speed = I2C_SPEED_NORMAL,
193  .scl_pin = GPIO_PIN(PA, 8),
194  .sda_pin = GPIO_PIN(PA, 9),
195  .mux = GPIO_MUX_C,
196  .gclk_src = SAM0_GCLK_MAIN,
197  .flags = I2C_FLAG_NONE
198  },
199  {
200  .dev = &(SERCOM2->I2CM),
201  .speed = I2C_SPEED_NORMAL,
202  .scl_pin = GPIO_PIN(PA, 12),
203  .sda_pin = GPIO_PIN(PA, 13),
204  .mux = GPIO_MUX_C,
205  .gclk_src = SAM0_GCLK_MAIN,
206  .flags = I2C_FLAG_NONE
207  }
208 };
209 
210 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
217 #ifndef RTT_FREQUENCY
218 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtc_rtt.c` */
219 #endif
227 /* ADC Default values */
228 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
229 
230 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
231 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
232 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
233 
234 /* Digital pins (1 to 6) on the board can be configured as analog inputs */
235 static const adc_conf_chan_t adc_channels[] = {
236  /* port, pin, muxpos */
237  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA04 }, /* Digital 1 */
238  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA05 }, /* Digital 2 */
239  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 }, /* Digital 3 */
240  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 }, /* Digital 4 */
241  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA03 }, /* Digital 5 */
242  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }, /* Digital 6 */
243 };
244 
245 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
252 static const sam0_common_usb_config_t sam_usbdev_config[] = {
253  {
254  .dm = GPIO_PIN(PA, 24),
255  .dp = GPIO_PIN(PA, 25),
256  .d_mux = GPIO_MUX_G,
257  .device = &USB->DEVICE,
258  .gclk_src = SAM0_GCLK_MAIN,
259  }
260 };
263 #ifdef __cplusplus
264 }
265 #endif
266 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:39
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
@ UART_PAD_RX_1
select pad 1
@ PB
port B
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_3
use pad 3 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_0
select pad 0
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA05
Alias for PIN5.
Definition: periph_cpu.h:123
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition: periph_cpu.h:75
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition: periph_cpu.h:125
#define ADC_INPUTCTRL_MUXPOS_PA04
Alias for PIN4.
Definition: periph_cpu.h:122
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition: periph_cpu.h:124
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition: periph_cpu.h:118
#define ADC_INPUTCTRL_MUXPOS_PA03
Alias for PIN1.
Definition: periph_cpu.h:119
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
USB peripheral parameters.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218