clock_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2025 Tom Hert <git@annsann.eu>
3  * SPDX-FileCopyrightText: 2025 HAW Hamburg
4  * SPDX-License-Identifier: LGPL-2.1-only
5  */
6 
7 #pragma once
8 
19 #include "RP2350.h"
20 #include "macros/units.h"
21 
25 #define XOSC_CTRL_FREQ_RANGE_VALUE_1_15MHZ 0xaa0u
27 #define XOSC_CTRL_FREQ_RANGE_VALUE_10_30MHZ 0xaa1u
29 #define XOSC_CTRL_FREQ_RANGE_VALUE_25_60MHZ 0xaa2u
31 #define XOSC_CTRL_FREQ_RANGE_VALUE_40_100MHZ 0xaa3u
33 #define XOSC_CTRL_ENABLE_VALUE_DISABLE 0xd1eu
35 #define XOSC_CTRL_ENABLE_VALUE_ENABLE 0xfabu
37 #define XOSC_CTRL_ENABLE_LSB 12u
39 #define XOSC_STATUS_STABLE_BITS 0x80000000u
41 #define XOSC_HZ MHZ(12u)
43 #define PLL_REF_DIV 2u
45 #define PLL_VCO_FREQ 750000000u
47 #define PLL_PD1 6u
49 #define PLL_PD2 2u
51 #define PLL_PWR_PD_BITS 0x00000001u
53 #define PLL_PWR_VCOPD_BITS 0x00000020u
55 #define PLL_CS_LOCK_BITS 0x80000000u
57 #define PLL_PRIM_POSTDIV1_LSB 16u
59 #define PLL_PRIM_POSTDIV2_LSB 12u
61 #define PLL_PWR_POSTDIVPD_BITS 0x00000008u
63 #define CLK_PERI_CTRL_ENABLE_BIT (1u << 11u)
65 #define CPUFREQ 125000000u
67 #define CLOCK_XOSC_MAX MHZ(15u)
69 #define CLOCK_XOSC_MIN MHZ(5u)
71 #define CLOCK_XOSC (XOSC_HZ)
73 #define PLL_POSTDIV_MIN 1u
75 #define PLL_POSTDIV_MAX 7u
77 #define PLL_VCO_FEEDBACK_SCALE_MIN 16u
79 #define PLL_VCO_FEEDBACK_SCALE_MAX 320u
82 #define PLL_REF_DIV_MIN 1u
85 #define PLL_REF_DIV_MAX 1u
87 #define PLL_FEEDBACK_DIVIDER_VALUE 125u
90 #define CLK_SYS_PERI_CTRL_ENABLE_BIT (1u << 0u)
93 #define CLK_SYS_SELECTED_PERI_FIELD_VALUE 2u
95 #define CLOCK_CORECLOCK MHZ(12u)
96 
97 #if (PLL_VCO_FEEDBACK_SCALE_MIN < PLL_VCO_FEEDBACK_SCALE_MIN) || \
98  (PLL_VCO_FEEDBACK_SCALE_MAX > PLL_VCO_FEEDBACK_SCALE_MAX)
99 # error "Value for PLL_VCO_FEEDBACK_SCALE out of range, check config"
100 #endif
101 #if (PLL_REF_DIV_MIN < PLL_REF_DIV_MIN) || (PLL_REF_DIV_MAX > PLL_REF_DIV_MAX)
102 # error "Value for PLLxosc_sleep_REF_DIV out of range, check config"
103 #endif
104 #if (PLL_POSTDIV_MIN < PLL_POSTDIV_MIN) || (PLL_POSTDIV_MAX > PLL_POSTDIV_MAX)
105 # error "Value for PLL_POSTDIV out of range, check config"
106 #endif
107 #if ((CLOCK_XOSC > CLOCK_XOSC_MAX) || (CLOCK_XOSC < CLOCK_XOSC_MIN))
108 # error "Value for CLOCK_XOSC out of range, check config"
109 #endif
110 
112 #define PDIV ((PLL_PD1 << PLL_PRIM_POSTDIV1_LSB) | (PLL_PD2 << PLL_PRIM_POSTDIV2_LSB))
115 #define FBDIV ((PLL_VCO_FREQ / XOSC_HZ) / PLL_REF_DIV)
116 #ifdef __cplusplus
117 extern "C" {
118 #endif
119 
125 void xosc_start(void);
126 
130 void xosc_stop(void);
131 
135 void xosc_sleep(int32_t cycles);
136 
143 void clock_reset(void);
144 
151 void cpu_clock_init(void);
152 
153 #ifdef __cplusplus
154 }
155 #endif
156 
void xosc_start(void)
Configures the Crystal to run.
void cpu_clock_init(void)
Configures the XOSC and then sets CLK_SYS, PLL_SYS and CLK_PERI to it.
void xosc_sleep(int32_t cycles)
Sleep for a given number of cycles.
void xosc_stop(void)
Stop the crystal.
void clock_reset(void)
Reset the clock system.
Unit helper macros.