irq_arch.h
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1 /*
2  * Copyright (C) 2018 Gunar Schorcht
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
23 #include "irq_arch_common.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
39 /* On Xtensa-based ESP32x SoCs, interrupt 0 is reserved for the WiFi interface
40  * and interrupt 1 is available. However, since interrupt 0 is not available on
41  * RISC-V-based ESP32x SoCs, interrupt 1 is used for the WiFi interface instead.
42  * Therefore, we use interrupt 1 for the RMT peripheral on Xtensa-based ESP32x
43  * SoCs, but we use interrupt 11 for the RMT peripheral on RISC-V-based ESP32x
44  * SoCs. Interrupt 11 is reserved for profiling on Xtensa-based ESP32x SoCs. */
45 #if defined(__XTENSA__)
46 # define CPU_INUM_RMT 1
47 #else
48 # define CPU_INUM_RMT 11
49 #endif
50 #define CPU_INUM_GPIO 2
51 #define CPU_INUM_BLE 5
52 #define CPU_INUM_RTT 9
53 #define CPU_INUM_SERIAL_JTAG 10
54 #define CPU_INUM_I2C 12
55 #define CPU_INUM_UART 13
56 #define CPU_INUM_CAN 17
57 #define CPU_INUM_ETH 18
58 #define CPU_INUM_USB 18
59 #define CPU_INUM_LCDCAM 19
60 #define CPU_INUM_FRC2 20
61 #define CPU_INUM_SYSTIMER 20
62 #define CPU_INUM_SDMMC 21
63 #define CPU_INUM_TIMER 22
64 #define CPU_INUM_WDT 23
65 #define CPU_INUM_SOFTWARE 29
71 void esp_irq_init(void);
72 
73 #ifdef __cplusplus
74 }
75 #endif
void esp_irq_init(void)
Initialize architecture specific interrupt handling.
Implementation of the kernels irq interface.