periph_conf.h
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1 /*
2  * Copyright (C) 2019 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
21 /* Add specific clock configuration (HSE, LSE) for this board here */
22 #ifndef CONFIG_BOARD_HAS_LSE
23 #define CONFIG_BOARD_HAS_LSE 1
24 #endif
25 
26 #include "periph_cpu.h"
27 #include "clk_conf.h"
28 #include "cfg_rtt_default.h"
29 #include "cfg_timer_tim2.h"
30 
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
34 
39 static const uart_conf_t uart_config[] = {
40  {
41  .dev = LPUART1,
42  .rcc_mask = RCC_APB1ENR_LPUART1EN,
43  .rx_pin = GPIO_PIN(PORT_B, 11),
44  .tx_pin = GPIO_PIN(PORT_B, 10),
45  .rx_af = GPIO_AF4,
46  .tx_af = GPIO_AF4,
47  .bus = APB1,
48  .irqn = LPUART1_IRQn,
49  .type = STM32_LPUART,
50  .clk_src = 0, /* Use APB clock */
51  },
52 };
53 
54 #define UART_0_ISR (isr_rng_lpuart1)
55 
56 #define UART_NUMOF ARRAY_SIZE(uart_config)
63 static const spi_conf_t spi_config[] = {
64  {
65  .dev = SPI1, /* connected to SX1272 */
66  .mosi_pin = GPIO_PIN(PORT_A, 12),
67  .miso_pin = GPIO_PIN(PORT_B, 4),
68  .sclk_pin = GPIO_PIN(PORT_B, 3),
69  .cs_pin = GPIO_PIN(PORT_A, 15),
70  .mosi_af = GPIO_AF0,
71  .miso_af = GPIO_AF0,
72  .sclk_af = GPIO_AF0,
73  .cs_af = GPIO_AF0,
74  .rccmask = RCC_APB2ENR_SPI1EN,
75  .apbbus = APB2,
76  },
77 };
78 
79 #define SPI_NUMOF ARRAY_SIZE(spi_config)
86 static const i2c_conf_t i2c_config[] = {
87  {
88  .dev = I2C1,
89  .speed = I2C_SPEED_NORMAL,
90  .scl_pin = GPIO_PIN(PORT_B, 6),
91  .sda_pin = GPIO_PIN(PORT_B, 7),
92  .scl_af = GPIO_AF1,
93  .sda_af = GPIO_AF1,
94  .bus = APB1,
95  .rcc_mask = RCC_APB1ENR_I2C1EN,
96  .irqn = I2C1_IRQn
97  }
98 };
99 
100 #define I2C_0_ISR isr_i2c1
101 
102 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
105 #ifdef __cplusplus
106 }
107 #endif
108 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_A
port A
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
Common configuration for STM32 Timer peripheral based on TIM2.
@ GPIO_AF1
use alternate function 1
Definition: cpu_gpio.h:102
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF0
use alternate function 0
Definition: cpu_gpio.h:101
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition: cpu_uart.h:38
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218