periph_conf.h
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1 /*
2  * Copyright (C) 2014 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
9 #pragma once
10 
21 #include "periph_cpu.h"
22 #include "clk_conf.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 static const timer_conf_t timer_config[] = {
33  {
34  .dev = TIM2,
35  .max = 0x0000ffff,
36  .rcc_mask = RCC_APB1ENR_TIM2EN,
37  .bus = APB1,
38  .irqn = TIM2_IRQn
39  },
40  {
41  .dev = TIM3,
42  .max = 0x0000ffff,
43  .rcc_mask = RCC_APB1ENR_TIM3EN,
44  .bus = APB1,
45  .irqn = TIM3_IRQn
46  }
47 };
48 
49 #define TIMER_0_ISR isr_tim2
50 #define TIMER_1_ISR isr_tim3
51 
52 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
59 static const uart_conf_t uart_config[] = {
60  {
61  .dev = USART2,
62  .rcc_mask = RCC_APB1ENR_USART2EN,
63  .rx_pin = GPIO_PIN(PORT_A, 3),
64  .tx_pin = GPIO_PIN(PORT_A, 2),
65  .bus = APB1,
66  .irqn = USART2_IRQn
67  }
68 };
69 
70 #define UART_0_ISR (isr_usart2)
71 
72 #define UART_NUMOF ARRAY_SIZE(uart_config)
79 static const spi_conf_t spi_config[] = {
80  {
81  .dev = SPI1,
82  .mosi_pin = GPIO_PIN(PORT_B, 17),
83  .miso_pin = GPIO_PIN(PORT_B, 16),
84  .sclk_pin = GPIO_PIN(PORT_B, 15),
85  .cs_pin = SPI_CS_UNDEF,
86  .rccmask = RCC_APB2ENR_SPI1EN,
87  .apbbus = APB2
88  }
89 };
90 
91 #define SPI_NUMOF ARRAY_SIZE(spi_config)
94 #ifdef __cplusplus
95 } /* end extern "C" */
96 #endif
97 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_A
port A
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:39
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition: periph_cpu.h:362
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
Timer device configuration.
Definition: periph_cpu.h:263
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218