periph_conf.h
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1 /*
2  * Copyright (C) 2020 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
21 #include "periph_cpu.h"
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
58 #define CLOCK_USE_PLL (1)
59 
60 #if CLOCK_USE_PLL
61 /* edit these values to adjust the PLL output frequency */
62 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
63 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
64 /* generate the actual used core clock frequency */
65 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
66 #else
67 /* edit this value to your needs */
68 #define CLOCK_DIV (1U)
69 /* generate the actual core clock frequency */
70 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
71 #endif
78 static const tc32_conf_t timer_config[] = {
79  { /* Timer 0 - System Clock */
80  .dev = TC3,
81  .irq = TC3_IRQn,
82  .pm_mask = PM_APBCMASK_TC3,
83  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
84 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
85  .gclk_src = SAM0_GCLK_1MHZ,
86 #else
87  .gclk_src = SAM0_GCLK_MAIN,
88 #endif
89  .flags = TC_CTRLA_MODE_COUNT16,
90  },
91  { /* Timer 1 */
92  .dev = TC4,
93  .irq = TC4_IRQn,
94  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
95  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
96 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
97  .gclk_src = SAM0_GCLK_1MHZ,
98 #else
99  .gclk_src = SAM0_GCLK_MAIN,
100 #endif
101  .flags = TC_CTRLA_MODE_COUNT32,
102  }
103 };
104 
105 #define TIMER_0_MAX_VALUE 0xffff
106 
107 /* interrupt function name mapping */
108 #define TIMER_0_ISR isr_tc3
109 #define TIMER_1_ISR isr_tc4
110 
111 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
118 static const uart_conf_t uart_config[] = {
119  {
120  .dev = &SERCOM5->USART,
121  .rx_pin = GPIO_PIN(PB,23),
122  .tx_pin = GPIO_PIN(PB,22),
123 #ifdef MODULE_SAM0_PERIPH_UART_HW_FC
124  .rts_pin = GPIO_UNDEF,
125  .cts_pin = GPIO_UNDEF,
126 #endif
127  .mux = GPIO_MUX_D,
128  .rx_pad = UART_PAD_RX_3,
129  .tx_pad = UART_PAD_TX_2,
130  .flags = UART_FLAG_NONE,
131  .gclk_src = SAM0_GCLK_MAIN,
132  }
133 };
134 
135 /* interrupt function name mapping */
136 #define UART_0_ISR isr_sercom5
137 
138 #define UART_NUMOF ARRAY_SIZE(uart_config)
145 #define PWM_0_EN 1
146 #define PWM_1_EN 1
147 
148 #if PWM_0_EN
149 /* PWM0 channels */
150 static const pwm_conf_chan_t pwm_chan0_config[] = {
151  /* GPIO pin, MUX value, TCC channel */
152  { GPIO_PIN(PA, 4), GPIO_MUX_E, 0},
153  { GPIO_PIN(PA, 5), GPIO_MUX_E, 1},
154 };
155 #endif
156 #if PWM_1_EN
157 /* PWM1 channels */
158 static const pwm_conf_chan_t pwm_chan1_config[] = {
159  /* GPIO pin, MUX value, TCC channel */
160  { GPIO_PIN(PA, 10), GPIO_MUX_E, 0 },
161  { GPIO_PIN(PA, 11), GPIO_MUX_E, 1 },
162 };
163 #endif
164 
165 /* PWM device configuration */
166 static const pwm_conf_t pwm_config[] = {
167 #if PWM_0_EN
168  {TCC_CONFIG(TCC0), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
169 #endif
170 
171 #if PWM_1_EN
172  {TCC_CONFIG(TCC1), pwm_chan1_config, ARRAY_SIZE(pwm_chan1_config), SAM0_GCLK_MAIN},
173 #endif
174 };
175 
176 /* number of devices that are actually defined */
177 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
185 /* ADC Default values */
186 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
187 
188 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
189 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
190 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
191 
192 static const adc_conf_chan_t adc_channels[] = {
193  /* port, pin, muxpos */
194  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }, /* A0 */
195  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB02 }, /* A1 */
196  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA11 }, /* A2 */
197  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA10 }, /* A3 */
198  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB08 }, /* A4 */
199  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB09 }, /* A5 */
200  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA09 }, /* A6 */
201  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB03 }, /* A7 */
202 };
203 
204 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
211 static const i2c_conf_t i2c_config[] = {
212  {
213  .dev = &(SERCOM4->I2CM),
214  .speed = I2C_SPEED_NORMAL,
215  .scl_pin = GPIO_PIN(PB, 9),
216  .sda_pin = GPIO_PIN(PB, 8),
217  .mux = GPIO_MUX_D,
218  .gclk_src = SAM0_GCLK_MAIN,
219  .flags = I2C_FLAG_NONE
220  }
221 };
222 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
229 static const spi_conf_t spi_config[] = {
230  { /* Connected to NINA W102 */
231  .dev = &SERCOM2->SPI,
232  .miso_pin = GPIO_PIN(PA, 13),
233  .mosi_pin = GPIO_PIN(PA, 12),
234  .clk_pin = GPIO_PIN(PA, 15),
235  .miso_mux = GPIO_MUX_C,
236  .mosi_mux = GPIO_MUX_C,
237  .clk_mux = GPIO_MUX_C,
238  .miso_pad = SPI_PAD_MISO_1,
239  .mosi_pad = SPI_PAD_MOSI_0_SCK_3,
240  .gclk_src = SAM0_GCLK_MAIN,
241  },
242  {
243  .dev = &SERCOM3->SPI,
244  .miso_pin = GPIO_PIN(PA, 19),
245  .mosi_pin = GPIO_PIN(PA, 16),
246  .clk_pin = GPIO_PIN(PA, 17),
247  .miso_mux = GPIO_MUX_D,
248  .mosi_mux = GPIO_MUX_D,
249  .clk_mux = GPIO_MUX_D,
250  .miso_pad = SPI_PAD_MISO_3,
251  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
252  .gclk_src = SAM0_GCLK_MAIN,
253  },
254 };
255 
256 #define SPI_NUMOF ARRAY_SIZE(spi_config)
263 #ifndef RTT_FREQUENCY
264 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
265 #endif
272 static const sam0_common_usb_config_t sam_usbdev_config[] = {
273  {
274  .dm = GPIO_PIN(PA, 24),
275  .dp = GPIO_PIN(PA, 25),
276  .d_mux = GPIO_MUX_G,
277  .device = &USB->DEVICE,
278  .gclk_src = SAM0_GCLK_MAIN,
279  }
280 };
283 #ifdef __cplusplus
284 }
285 #endif
286 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:39
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:221
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: container.h:82
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
@ UART_PAD_RX_3
select pad 3
@ PB
port B
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_1
use pad 1 for MISO line
@ SPI_PAD_MISO_3
use pad 3 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_2
select pad 2
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_0_SCK_3
use pad 0 for MOSI, pad 3 for SCK
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK
#define ADC_INPUTCTRL_MUXPOS_PB08
Alias for PIN2.
Definition: periph_cpu.h:120
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition: periph_cpu.h:75
#define ADC_INPUTCTRL_MUXPOS_PB02
Alias for PIN10.
Definition: periph_cpu.h:128
#define ADC_INPUTCTRL_MUXPOS_PA10
Alias for PIN18.
Definition: periph_cpu.h:136
#define ADC_INPUTCTRL_MUXPOS_PA11
Alias for PIN19.
Definition: periph_cpu.h:137
#define ADC_INPUTCTRL_MUXPOS_PB09
Alias for PIN3.
Definition: periph_cpu.h:121
#define ADC_INPUTCTRL_MUXPOS_PA09
Alias for PIN17.
Definition: periph_cpu.h:135
#define ADC_INPUTCTRL_MUXPOS_PB03
Alias for PIN11.
Definition: periph_cpu.h:129
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition: periph_cpu.h:118
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
PWM channel configuration data structure.
PWM device configuration.
USB peripheral parameters.
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218