periph_conf.h
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1 /*
2  * Copyright (C) 2021 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
21 /* Add specific clock configuration (HSE, LSE) for this board here */
22 #ifndef CONFIG_BOARD_HAS_LSE
23 #define CONFIG_BOARD_HAS_LSE 1
24 #endif
25 
26 #include "periph_cpu.h"
27 #include "clk_conf.h"
28 #include "cfg_timer_tim5.h"
29 #include "cfg_usb_otg_fs_u5.h"
30 
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
34 
39 static const uart_conf_t uart_config[] = {
40  {
41  .dev = USART1,
42  .rcc_mask = RCC_APB2ENR_USART1EN,
43  .rx_pin = GPIO_PIN(PORT_A, 10),
44  .tx_pin = GPIO_PIN(PORT_A, 9),
45  .rx_af = GPIO_AF7,
46  .tx_af = GPIO_AF7,
47  .bus = APB2,
48  .irqn = USART1_IRQn,
49  .type = STM32_USART,
50  .clk_src = 0, /* Use APB clock */
51  },
52  { /* Connected to Arduino D0/D1 and STMOD+2 */
53  .dev = USART3,
54  .rcc_mask = RCC_APB1ENR1_USART3EN,
55  .rx_pin = GPIO_PIN(PORT_D, 9),
56  .tx_pin = GPIO_PIN(PORT_D, 8),
57  .rx_af = GPIO_AF7,
58  .tx_af = GPIO_AF7,
59  .bus = APB1,
60  .irqn = USART3_IRQn,
61  .type = STM32_USART,
62  .clk_src = 0, /* Use APB clock */
63  },
64  { /* Connected to STMOD+1 */
65  .dev = USART2,
66  .rcc_mask = RCC_APB1ENR1_USART2EN,
67  .rx_pin = GPIO_PIN(PORT_A, 3),
68  .tx_pin = GPIO_PIN(PORT_A, 2),
69  .rx_af = GPIO_AF7,
70  .tx_af = GPIO_AF7,
71  .bus = APB1,
72  .irqn = USART2_IRQn,
73  .type = STM32_USART,
74  .clk_src = 0, /* Use APB clock */
75  },
76  { /* Connected to Wireless */
77  .dev = UART4,
78  .rcc_mask = RCC_APB1ENR1_UART4EN,
79  .rx_pin = GPIO_PIN(PORT_C, 11),
80  .tx_pin = GPIO_PIN(PORT_C, 10),
81  .rx_af = GPIO_AF7,
82  .tx_af = GPIO_AF7,
83  .bus = APB1,
84  .irqn = UART4_IRQn,
85  .type = STM32_USART,
86  .clk_src = 0, /* Use APB clock */
87  },
88 };
89 
90 #define UART_0_ISR (isr_usart1)
91 #define UART_1_ISR (isr_usart3)
92 #define UART_2_ISR (isr_usart2)
93 #define UART_3_ISR (isr_uart4)
94 
95 #define UART_NUMOF ARRAY_SIZE(uart_config)
102 static const spi_conf_t spi_config[] = {
103  {
104  .dev = SPI1,
105  .mosi_pin = GPIO_PIN(PORT_E, 15), /* Arduino D11 */
106  .miso_pin = GPIO_PIN(PORT_E, 14), /* Arduino D12 */
107  .sclk_pin = GPIO_PIN(PORT_E, 13), /* Arduino D13 */
108  .cs_pin = GPIO_UNDEF,
109  .mosi_af = GPIO_AF5,
110  .miso_af = GPIO_AF5,
111  .sclk_af = GPIO_AF5,
112  .cs_af = GPIO_AF5,
113  .rccmask = RCC_APB2ENR_SPI1EN,
114  .apbbus = APB2,
115  },
116  { /* Connected to wireless */
117  .dev = SPI2,
118  .mosi_pin = GPIO_PIN(PORT_D, 4),
119  .miso_pin = GPIO_PIN(PORT_D, 3),
120  .sclk_pin = GPIO_PIN(PORT_D, 1),
121  .cs_pin = GPIO_PIN(PORT_B, 12),
122  .mosi_af = GPIO_AF5,
123  .miso_af = GPIO_AF5,
124  .sclk_af = GPIO_AF5,
125  .cs_af = GPIO_AF5,
126  .rccmask = RCC_APB1ENR1_SPI2EN,
127  .apbbus = APB1,
128  },
129  { /* Connected to STMOD+ 2 */
130  .dev = SPI3,
131  .mosi_pin = GPIO_PIN(PORT_D, 6),
132  .miso_pin = GPIO_PIN(PORT_G, 10),
133  .sclk_pin = GPIO_PIN(PORT_G, 9),
134  .cs_pin = GPIO_PIN(PORT_G, 12),
135  .mosi_af = GPIO_AF5,
136  .miso_af = GPIO_AF5,
137  .sclk_af = GPIO_AF5,
138  .cs_af = GPIO_AF5,
139  .rccmask = RCC_APB3ENR_SPI3EN,
140  .apbbus = APB3,
141  },
142 };
143 
144 #define SPI_NUMOF ARRAY_SIZE(spi_config)
151 static const i2c_conf_t i2c_config[] = {
152  {
153  .dev = I2C1,
154  .speed = I2C_SPEED_NORMAL,
155  .scl_pin = GPIO_PIN(PORT_B, 8),
156  .sda_pin = GPIO_PIN(PORT_B, 9),
157  .scl_af = GPIO_AF4,
158  .sda_af = GPIO_AF4,
159  .bus = APB1,
160  .rcc_mask = RCC_APB1ENR1_I2C1EN,
161  .rcc_sw_mask = RCC_CCIPR1_I2C1SEL_1,
162  .irqn = I2C1_ER_IRQn,
163  },
164  {
165  .dev = I2C2,
166  .speed = I2C_SPEED_NORMAL,
167  .scl_pin = GPIO_PIN(PORT_H, 4),
168  .sda_pin = GPIO_PIN(PORT_H, 5),
169  .scl_af = GPIO_AF4,
170  .sda_af = GPIO_AF4,
171  .bus = APB1,
172  .rcc_mask = RCC_APB1ENR1_I2C2EN,
173  .rcc_sw_mask = RCC_CCIPR1_I2C2SEL_1,
174  .irqn = I2C2_ER_IRQn,
175  },
176 };
177 
178 #define I2C_0_ISR isr_i2c1_er
179 #define I2C_1_ISR isr_i2c2_er
180 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
183 #ifdef __cplusplus
184 }
185 #endif
186 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_G
port G
Definition: periph_cpu.h:52
@ PORT_C
port C
Definition: periph_cpu.h:48
@ PORT_E
port E
Definition: periph_cpu.h:50
@ PORT_A
port A
Definition: periph_cpu.h:46
@ PORT_D
port D
Definition: periph_cpu.h:49
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
@ PORT_H
port H
Definition: periph_cpu.h:51
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
Common configuration for STM32 Timer peripheral based on TIM5.
Common configuration for STM32 OTG FS peripheral for U5 family.
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
@ STM32_USART
STM32 USART module type.
Definition: cpu_uart.h:37
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218