periph_conf.h
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1 /*
2  * Copyright (C) 2017 Kees Bakker, SODAQ
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
21 #include <stdint.h>
22 
23 #include "cpu.h"
24 #include "periph_cpu.h"
25 #include "cfg_clock_default.h"
26 #include "cfg_rtc_default.h"
27 #include "cfg_rtt_default.h"
28 #include "cfg_timer_default.h"
29 #include "cfg_usbdev_default.h"
30 
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
34 
40 static const uart_conf_t uart_config[] = {
41  {
42  .dev = &SERCOM5->USART,
43  .rx_pin = GPIO_PIN(PB,3), /* D0, RX Pin */
44  .tx_pin = GPIO_PIN(PB,2), /* D1, TX Pin */
45 #ifdef MODULE_PERIPH_UART_HW_FC
46  .rts_pin = GPIO_UNDEF,
47  .cts_pin = GPIO_UNDEF,
48 #endif
49  .mux = GPIO_MUX_D,
50  .rx_pad = UART_PAD_RX_1,
51  .tx_pad = UART_PAD_TX_0,
52  .flags = UART_FLAG_NONE,
53  .gclk_src = SAM0_GCLK_MAIN,
54  },
55  {
56  .dev = &SERCOM2->USART,
57  .rx_pin = GPIO_PIN(PA,13),
58  .tx_pin = GPIO_PIN(PA,12),
59 #ifdef MODULE_PERIPH_UART_HW_FC
60  .rts_pin = GPIO_UNDEF,
61  .cts_pin = GPIO_UNDEF,
62 #endif
63  .mux = GPIO_MUX_C,
64  .rx_pad = UART_PAD_RX_1,
65  .tx_pad = UART_PAD_TX_0,
66  .flags = UART_FLAG_NONE,
67  .gclk_src = SAM0_GCLK_MAIN,
68  },
69 };
70 
71 /* interrupt function name mapping */
72 #define UART_0_ISR isr_sercom5
73 #define UART_1_ISR isr_sercom2
74 
75 #define UART_NUMOF ARRAY_SIZE(uart_config)
83 /* ADC Default values */
84 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
85 
86 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
87 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_DIV2
88 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1
89 
90 static const adc_conf_chan_t adc_channels[] = {
91  /* port, pin, muxpos */
92  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }, /* A0 */
93  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA03 }, /* A1 */
94  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB08 }, /* A2 */
95  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB09 }, /* A3 */
96  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 }, /* A4 */
97  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 }, /* A5 */
98  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA08 }, /* A6 */
99  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA09 }, /* A7 */
100  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA10 }, /* A8 */
101  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA11 }, /* A9 */
102 #if 0
103  /* These pins are also used for RX/TX uart0 */
104  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB02 }, /* A10, TX */
105  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB03 }, /* A11, RX */
106 #endif
107 
108  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA05 }, /* BAT_VOLT */
109 };
110 
111 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
118 static const spi_conf_t spi_config[] = {
119  {
120  .dev = &SERCOM0->SPI,
121  .miso_pin = GPIO_PIN(PA, 8),
122  .mosi_pin = GPIO_PIN(PA, 10),
123  .clk_pin = GPIO_PIN(PA, 11),
124  .miso_mux = GPIO_MUX_C,
125  .mosi_mux = GPIO_MUX_C,
126  .clk_mux = GPIO_MUX_C,
127  .miso_pad = SPI_PAD_MISO_0,
128  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
129  .gclk_src = SAM0_GCLK_MAIN,
130 #ifdef MODULE_PERIPH_DMA
131  .tx_trigger = SERCOM0_DMAC_ID_TX,
132  .rx_trigger = SERCOM0_DMAC_ID_RX,
133 #endif
134  }
135 };
136 
137 #define SPI_NUMOF ARRAY_SIZE(spi_config)
144 static const i2c_conf_t i2c_config[] = {
145  {
146  .dev = &(SERCOM3->I2CM),
147  .speed = I2C_SPEED_NORMAL,
148  .scl_pin = GPIO_PIN(PA, 23),
149  .sda_pin = GPIO_PIN(PA, 22),
150  .mux = GPIO_MUX_C,
151  .gclk_src = SAM0_GCLK_MAIN,
152  .flags = I2C_FLAG_NONE
153  }
154 };
155 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
158 #ifdef __cplusplus
159 }
160 #endif
161 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:38
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:96
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:68
Default RTC configuration for SODAQ boards.
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:277
@ UART_PAD_RX_1
select pad 1
@ PB
port B
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_0
select pad 0
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA05
Alias for PIN5.
Definition: periph_cpu.h:123
#define ADC_INPUTCTRL_MUXPOS_PB08
Alias for PIN2.
Definition: periph_cpu.h:120
#define ADC_INPUTCTRL_MUXPOS_PB02
Alias for PIN10.
Definition: periph_cpu.h:128
#define ADC_INPUTCTRL_MUXPOS_PA10
Alias for PIN18.
Definition: periph_cpu.h:136
#define ADC_INPUTCTRL_MUXPOS_PA11
Alias for PIN19.
Definition: periph_cpu.h:137
#define ADC_INPUTCTRL_MUXPOS_PA08
Alias for PIN16.
Definition: periph_cpu.h:134
#define ADC_INPUTCTRL_MUXPOS_PB09
Alias for PIN3.
Definition: periph_cpu.h:121
#define ADC_INPUTCTRL_MUXPOS_PA09
Alias for PIN17.
Definition: periph_cpu.h:135
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition: periph_cpu.h:125
#define ADC_INPUTCTRL_MUXPOS_PB03
Alias for PIN11.
Definition: periph_cpu.h:129
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition: periph_cpu.h:124
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition: periph_cpu.h:118
#define ADC_INPUTCTRL_MUXPOS_PA03
Alias for PIN1.
Definition: periph_cpu.h:119
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition: periph_cpu.h:298
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:299
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337
UART device configuration.
Definition: periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:218