periph_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2016 Frits Kuipers
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 #include "periph_cpu.h"
19 #include "clk_conf.h"
20 
21 #ifdef __cplusplus
22 extern "C" {
23 #endif
24 
29 static const timer_conf_t timer_config[] = {
30  {
31  .dev = TIM2,
32  .max = 0x0000ffff,
33  .rcc_mask = RCC_APB1ENR_TIM2EN,
34  .bus = APB1,
35  .irqn = TIM2_IRQn
36  },
37  {
38  .dev = TIM3,
39  .max = 0x0000ffff,
40  .rcc_mask = RCC_APB1ENR_TIM3EN,
41  .bus = APB1,
42  .irqn = TIM3_IRQn
43  }
44 };
45 
46 #define TIMER_0_ISR isr_tim2
47 #define TIMER_1_ISR isr_tim3
48 
49 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
56 static const uart_conf_t uart_config[] = {
57  {
58  .dev = USART2,
59  .rcc_mask = RCC_APB1ENR_USART2EN,
60  .rx_pin = GPIO_PIN(PORT_A, 3),
61  .tx_pin = GPIO_PIN(PORT_A, 2),
62  .bus = APB1,
63  .irqn = USART2_IRQn
64  },
65  {
66  .dev = USART1,
67  .rcc_mask = RCC_APB2ENR_USART1EN,
68  .rx_pin = GPIO_PIN(PORT_A, 10),
69  .tx_pin = GPIO_PIN(PORT_A, 9),
70  .bus = APB2,
71  .irqn = USART1_IRQn
72  },
73  {
74  .dev = USART3,
75  .rcc_mask = RCC_APB1ENR_USART3EN,
76  .rx_pin = GPIO_PIN(PORT_B, 11),
77  .tx_pin = GPIO_PIN(PORT_B, 10),
78  .bus = APB1,
79  .irqn = USART3_IRQn
80  }
81 };
82 
83 #define UART_0_ISR isr_usart2
84 #define UART_1_ISR isr_usart1
85 #define UART_2_ISR isr_usart3
86 
87 #define UART_NUMOF ARRAY_SIZE(uart_config)
94 static const i2c_conf_t i2c_config[] = {
95  {
96  .dev = I2C1,
97  .speed = I2C_SPEED_NORMAL,
98  .scl_pin = GPIO_PIN(PORT_B, 8), /* D15 */
99  .sda_pin = GPIO_PIN(PORT_B, 9), /* D16 */
100  .bus = APB1,
101  .rcc_mask = RCC_APB1ENR_I2C1EN,
102  .clk = CLOCK_APB1,
103  .irqn = I2C1_EV_IRQn
104  },
105  {
106  .dev = I2C2,
107  .speed = I2C_SPEED_NORMAL,
108  .scl_pin = GPIO_PIN(PORT_B, 10), /* D1 */
109  .sda_pin = GPIO_PIN(PORT_B, 11), /* D0 */
110  .bus = APB1,
111  .rcc_mask = RCC_APB1ENR_I2C2EN,
112  .clk = CLOCK_APB1,
113  .irqn = I2C2_EV_IRQn
114  }
115 };
116 
117 #define I2C_0_ISR isr_i2c1_ev
118 #define I2C_1_ISR isr_i2c2_ev
119 
120 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
127 static const spi_conf_t spi_config[] = {
128  {
129  .dev = SPI1,
130  .mosi_pin = GPIO_PIN(PORT_A, 7),
131  .miso_pin = GPIO_PIN(PORT_A, 6),
132  .sclk_pin = GPIO_PIN(PORT_A, 5),
133  .cs_pin = SPI_CS_UNDEF,
134  .rccmask = RCC_APB2ENR_SPI1EN,
135  .apbbus = APB2
136  },
137  {
138  .dev = SPI2,
139  .mosi_pin = GPIO_PIN(PORT_B, 15),
140  .miso_pin = GPIO_PIN(PORT_B, 14),
141  .sclk_pin = GPIO_PIN(PORT_B, 13),
142  .cs_pin = SPI_CS_UNDEF,
143  .rccmask = RCC_APB1ENR_SPI2EN,
144  .apbbus = APB1
145  }
146 };
147 
148 #define SPI_NUMOF ARRAY_SIZE(spi_config)
151 #ifdef __cplusplus
152 }
153 #endif
154 
@ PORT_B
port B
Definition: periph_cpu.h:44
@ PORT_A
port A
Definition: periph_cpu.h:43
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:42
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:65
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:36
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition: periph_cpu.h:362
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:274
#define CLOCK_APB1
Half AHB clock.
I2C configuration structure.
Definition: periph_cpu.h:295
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:296
SPI device configuration.
Definition: periph_cpu.h:333
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:334
Timer device configuration.
Definition: periph_cpu.h:260
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:261
UART device configuration.
Definition: periph_cpu.h:214
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:215