periph_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2014 Freie Universität Berlin
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 /* This board provides an HSE */
19 #ifndef CONFIG_BOARD_HAS_HSE
20 #define CONFIG_BOARD_HAS_HSE 1
21 #endif
22 
23 /* The HSE provides a 16MHz clock */
24 #ifndef CONFIG_CLOCK_HSE
25 #define CONFIG_CLOCK_HSE MHZ(16)
26 #endif
27 
28 #include "periph_cpu.h"
29 #include "clk_conf.h"
30 
31 #ifdef __cplusplus
32 extern "C" {
33 #endif
34 
39 static const dma_conf_t dma_config[] = {
40  { .stream = 11 }, /* DMA2 Stream 3 - SPI1_TX */
41  { .stream = 10 }, /* DMA2 Stream 2 - SPI1_RX */
42 };
43 
44 #define DMA_0_ISR isr_dma2_stream3
45 #define DMA_1_ISR isr_dma2_stream2
46 
47 #define DMA_NUMOF ARRAY_SIZE(dma_config)
54 static const timer_conf_t timer_config[] = {
55  {
56  .dev = TIM2,
57  .max = 0xffffffff,
58  .rcc_mask = RCC_APB1ENR_TIM2EN,
59  .bus = APB1,
60  .irqn = TIM2_IRQn
61  },
62  {
63  .dev = TIM5,
64  .max = 0xffffffff,
65  .rcc_mask = RCC_APB1ENR_TIM5EN,
66  .bus = APB1,
67  .irqn = TIM5_IRQn
68  }
69 };
70 
71 #define TIMER_0_ISR isr_tim2
72 #define TIMER_1_ISR isr_tim5
73 
74 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
81 static const pwm_conf_t pwm_config[] = {
82  {
83  .dev = TIM11,
84  .rcc_mask = RCC_APB2ENR_TIM11EN,
85  .chan = { { .pin = GPIO_PIN(PORT_B, 9), .cc_chan = 0 },
86  { .pin = GPIO_UNDEF, .cc_chan = 0 },
87  { .pin = GPIO_UNDEF, .cc_chan = 0 },
88  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
89  .af = GPIO_AF3,
90  .bus = APB2
91  }
92 };
93 
94 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
104 static const adc_conf_t adc_config[] = {
105  {GPIO_PIN(PORT_B, 0), 0, 8},
106  {GPIO_PIN(PORT_B, 1), 0, 9},
107  {GPIO_UNDEF, 0, 18}, /* VBAT */
108 };
109 
110 #define VBAT_ADC ADC_LINE(2)
111 #define ADC_NUMOF ARRAY_SIZE(adc_config)
118 static const dac_conf_t dac_config[] = {
119  { .pin = GPIO_PIN(PORT_A, 4), .chan = 0 },
120  { .pin = GPIO_PIN(PORT_A, 5), .chan = 1 }
121 };
122 
123 #define DAC_NUMOF ARRAY_SIZE(dac_config)
130 static const uart_conf_t uart_config[] = {
131  {
132  .dev = USART2,
133  .rcc_mask = RCC_APB1ENR_USART2EN,
134  .rx_pin = GPIO_PIN(PORT_A, 3),
135  .tx_pin = GPIO_PIN(PORT_A, 2),
136  .rx_af = GPIO_AF7,
137  .tx_af = GPIO_AF7,
138  .bus = APB1,
139  .irqn = USART2_IRQn,
140 #ifdef MODULE_PERIPH_DMA
141  .dma = DMA_STREAM_UNDEF,
142  .dma_chan = UINT8_MAX,
143 #endif
144  },
145  {
146  .dev = USART1,
147  .rcc_mask = RCC_APB2ENR_USART1EN,
148  .rx_pin = GPIO_PIN(PORT_A, 10),
149  .tx_pin = GPIO_PIN(PORT_A, 9),
150  .rx_af = GPIO_AF7,
151  .tx_af = GPIO_AF7,
152  .bus = APB2,
153  .irqn = USART1_IRQn,
154 #ifdef MODULE_PERIPH_DMA
155  .dma = DMA_STREAM_UNDEF,
156  .dma_chan = UINT8_MAX,
157 #endif
158  },
159  {
160  .dev = USART3,
161  .rcc_mask = RCC_APB1ENR_USART3EN,
162  .rx_pin = GPIO_PIN(PORT_D, 9),
163  .tx_pin = GPIO_PIN(PORT_D, 8),
164  .rx_af = GPIO_AF7,
165  .tx_af = GPIO_AF7,
166  .bus = APB1,
167  .irqn = USART3_IRQn,
168 #ifdef MODULE_PERIPH_DMA
169  .dma = DMA_STREAM_UNDEF,
170  .dma_chan = UINT8_MAX,
171 #endif
172  },
173 };
174 
175 /* assign ISR vector names */
176 #define UART_0_ISR (isr_usart2)
177 #define UART_1_ISR (isr_usart1)
178 #define UART_2_ISR (isr_usart3)
179 
180 /* deduct number of defined UART interfaces */
181 #define UART_NUMOF ARRAY_SIZE(uart_config)
188 static const spi_conf_t spi_config[] = {
189  {
190  .dev = SPI1,
191  .mosi_pin = GPIO_PIN(PORT_A, 7),
192  .miso_pin = GPIO_PIN(PORT_A, 6),
193  .sclk_pin = GPIO_PIN(PORT_A, 5),
194  .cs_pin = GPIO_PIN(PORT_A, 4),
195  .mosi_af = GPIO_AF5,
196  .miso_af = GPIO_AF5,
197  .sclk_af = GPIO_AF5,
198  .cs_af = GPIO_AF5,
199  .rccmask = RCC_APB2ENR_SPI1EN,
200  .apbbus = APB2,
201 #ifdef MODULE_PERIPH_DMA
202  .tx_dma = 0,
203  .tx_dma_chan = 3,
204  .rx_dma = 1,
205  .rx_dma_chan = 3,
206 #endif
207  }
208 };
209 
210 #define SPI_NUMOF ARRAY_SIZE(spi_config)
217 static const i2c_conf_t i2c_config[] = {
218  {
219  .dev = I2C1,
220  .speed = I2C_SPEED_NORMAL,
221  .scl_pin = GPIO_PIN(PORT_B, 6),
222  .sda_pin = GPIO_PIN(PORT_B, 7),
223  .scl_af = GPIO_AF4,
224  .sda_af = GPIO_AF4,
225  .bus = APB1,
226  .rcc_mask = RCC_APB1ENR_I2C1EN,
227  .clk = CLOCK_APB1,
228  .irqn = I2C1_EV_IRQn
229  }
230 };
231 
232 #define I2C_0_ISR isr_i2c1_ev
233 
234 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
237 #ifdef __cplusplus
238 }
239 #endif
240 
@ PORT_B
port B
Definition: periph_cpu.h:44
@ PORT_A
port A
Definition: periph_cpu.h:43
@ PORT_D
port D
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:42
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:65
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:36
static const adc_conf_t adc_config[]
ADC configuration.
Definition: periph_conf.h:247
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:218
static const dac_conf_t dac_config[]
DAC configuration.
Definition: periph_conf.h:249
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF3
use alternate function 3
Definition: cpu_gpio.h:104
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:274
#define CLOCK_APB1
Half AHB clock.
ADC device configuration.
Definition: periph_cpu.h:374
DAC line configuration data.
Definition: periph_cpu.h:300
gpio_t pin
pin connected to the line
Definition: periph_cpu.h:301
DMA configuration.
Definition: cpu_dma.h:31
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: cpu_dma.h:54
I2C configuration structure.
Definition: periph_cpu.h:295
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:296
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:333
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:334
Timer device configuration.
Definition: periph_cpu.h:260
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:261
UART device configuration.
Definition: periph_cpu.h:214
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:215