periph_conf.h
Go to the documentation of this file.
1 /*
2  * SPDX-FileCopyrightText: 2016 Fundacion Inria Chile
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 #include "periph_cpu.h"
19 #include "clk_conf.h"
20 #include "cfg_timer_tim5.h"
21 
22 #ifdef __cplusplus
23 extern "C" {
24 #endif
25 
30 static const uart_conf_t uart_config[] = {
31  {
32  .dev = USART3,
33  .rcc_mask = RCC_APB1ENR_USART3EN,
34  .rx_pin = GPIO_PIN(PORT_B, 11),
35  .tx_pin = GPIO_PIN(PORT_B, 10),
36  .rx_af = GPIO_AF7,
37  .tx_af = GPIO_AF7,
38  .bus = APB1,
39  .irqn = USART3_IRQn
40  },
41  {
42  .dev = USART2,
43  .rcc_mask = RCC_APB1ENR_USART2EN,
44  .rx_pin = GPIO_PIN(PORT_A, 3),
45  .tx_pin = GPIO_PIN(PORT_A, 2),
46  .rx_af = GPIO_AF7,
47  .tx_af = GPIO_AF7,
48  .bus = APB1,
49  .irqn = USART2_IRQn
50  },
51  {
52  .dev = USART1,
53  .rcc_mask = RCC_APB2ENR_USART1EN,
54  .rx_pin = GPIO_PIN(PORT_A, 10),
55  .tx_pin = GPIO_PIN(PORT_A, 9),
56  .rx_af = GPIO_AF7,
57  .tx_af = GPIO_AF7,
58  .bus = APB2,
59  .irqn = USART1_IRQn
60  }
61 };
62 
63 #define UART_0_ISR (isr_usart3)
64 #define UART_1_ISR (isr_usart2)
65 #define UART_2_ISR (isr_usart1)
66 
67 #define UART_NUMOF ARRAY_SIZE(uart_config)
74 static const pwm_conf_t pwm_config[] = {
75  {
76  .dev = TIM3,
77  .rcc_mask = RCC_APB1ENR_TIM3EN,
78  .chan = { { .pin = GPIO_PIN(PORT_C, 6), .cc_chan = 0 },
79  { .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1 },
80  { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 },
81  { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } },
82  .af = GPIO_AF2,
83  .bus = APB1
84  }
85 };
86 
87 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
94 static const spi_conf_t spi_config[] = {
95  {
96  .dev = SPI1,
97  .mosi_pin = GPIO_PIN(PORT_B, 5),
98  .miso_pin = GPIO_PIN(PORT_B, 4),
99  .sclk_pin = GPIO_PIN(PORT_B, 3),
100  .cs_pin = SPI_CS_UNDEF,
101  .mosi_af = GPIO_AF5,
102  .miso_af = GPIO_AF5,
103  .sclk_af = GPIO_AF5,
104  .cs_af = GPIO_AF5,
105  .rccmask = RCC_APB2ENR_SPI1EN,
106  .apbbus = APB2
107  },
108  {
109  .dev = SPI2,
110  .mosi_pin = GPIO_PIN(PORT_B, 15),
111  .miso_pin = GPIO_PIN(PORT_B, 14),
112  .sclk_pin = GPIO_PIN(PORT_B, 13),
113  .cs_pin = SPI_CS_UNDEF,
114  .mosi_af = GPIO_AF5,
115  .miso_af = GPIO_AF5,
116  .sclk_af = GPIO_AF5,
117  .cs_af = GPIO_AF5,
118  .rccmask = RCC_APB1ENR_SPI2EN,
119  .apbbus = APB1
120  },
121  {
122  .dev = SPI3,
123  .mosi_pin = GPIO_PIN(PORT_C, 12),
124  .miso_pin = GPIO_PIN(PORT_C, 11),
125  .sclk_pin = GPIO_PIN(PORT_C, 10),
126  .cs_pin = SPI_CS_UNDEF,
127  .mosi_af = GPIO_AF6,
128  .miso_af = GPIO_AF6,
129  .sclk_af = GPIO_AF6,
130  .cs_af = GPIO_AF6,
131  .rccmask = RCC_APB1ENR_SPI3EN,
132  .apbbus = APB1
133  }
134 };
135 
136 #define SPI_NUMOF ARRAY_SIZE(spi_config)
143 static const i2c_conf_t i2c_config[] = {
144  {
145  .dev = I2C1,
146  .speed = I2C_SPEED_NORMAL,
147  .scl_pin = GPIO_PIN(PORT_B, 8),
148  .sda_pin = GPIO_PIN(PORT_B, 9),
149  .scl_af = GPIO_AF4,
150  .sda_af = GPIO_AF4,
151  .bus = APB1,
152  .rcc_mask = RCC_APB1ENR_I2C1EN,
153  .clk = CLOCK_APB1,
154  .irqn = I2C1_EV_IRQn
155  }
156 };
157 
158 #define I2C_0_ISR isr_i2c1_ev
159 
160 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
167 static const adc_conf_t adc_config[] = {
168  { GPIO_PIN(PORT_C, 0), 10 },
169  { GPIO_PIN(PORT_C, 1), 11 },
170  { GPIO_PIN(PORT_C, 2), 12 },
171  /* ADC Temperature channel */
172  { GPIO_UNDEF, 16 },
173  /* ADC VREF channel */
174  { GPIO_UNDEF, 17 },
175 };
176 
177 #define ADC_NUMOF ARRAY_SIZE(adc_config)
184 static const dac_conf_t dac_config[] = {
185  { .pin = GPIO_PIN(PORT_A, 4), .chan = 0 },
186  { .pin = GPIO_PIN(PORT_A, 5), .chan = 1 }
187 };
188 
189 #define DAC_NUMOF ARRAY_SIZE(dac_config)
192 #ifdef __cplusplus
193 }
194 #endif
195 
@ PORT_B
port B
Definition: periph_cpu.h:44
@ PORT_C
port C
Definition: periph_cpu.h:45
@ PORT_A
port A
Definition: periph_cpu.h:43
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:42
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:65
static const adc_conf_t adc_config[]
ADC configuration.
Definition: periph_conf.h:247
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:218
static const dac_conf_t dac_config[]
DAC configuration.
Definition: periph_conf.h:249
Common configuration for STM32 Timer peripheral based on TIM5.
@ GPIO_AF2
use alternate function 2
Definition: cpu_gpio.h:103
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF6
use alternate function 6
Definition: cpu_gpio.h:107
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition: periph_cpu.h:362
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:274
#define CLOCK_APB1
Half AHB clock.
ADC device configuration.
Definition: periph_cpu.h:374
DAC line configuration data.
Definition: periph_cpu.h:300
gpio_t pin
pin connected to the line
Definition: periph_cpu.h:301
I2C configuration structure.
Definition: periph_cpu.h:295
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:296
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition: periph_cpu.h:333
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:334
UART device configuration.
Definition: periph_cpu.h:214
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:215