periph_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2017 Baptiste Clenet <bapclenet@gmail.com>
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 #include "periph_cpu.h"
19 
20 #ifdef __cplusplus
21 extern "C" {
22 #endif
23 
27 #define CLOCK_CORECLOCK (48000000U)
28 
33 static const tc32_conf_t timer_config[] = {
34  { /* Timer 0 - System Clock */
35  .dev = TC0,
36  .irq = TC0_IRQn,
37  .mclk = &MCLK->APBCMASK.reg,
38  .mclk_mask = MCLK_APBCMASK_TC0_Msk | MCLK_APBCMASK_TC1_Msk,
39  .gclk_id = TC0_GCLK_ID,
40  .gclk_src = SAM0_GCLK_TIMER,
41  .flags = TC_CTRLA_MODE_COUNT32,
42  }
43 };
44 
45 /* Timer 0 configuration */
46 #define TIMER_0_CHANNELS 2
47 #define TIMER_0_ISR isr_tc0
48 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
55 static const uart_conf_t uart_config[] = {
56  { /* Virtual COM Port */
57  .dev = &SERCOM0->USART,
58  .rx_pin = GPIO_PIN(PA,5),
59  .tx_pin = GPIO_PIN(PA,4),
60 #ifdef MODULE_PERIPH_UART_HW_FC
61  .rts_pin = GPIO_UNDEF,
62  .cts_pin = GPIO_UNDEF,
63 #endif
64  .mux = GPIO_MUX_D,
65  .rx_pad = UART_PAD_RX_1,
66  .tx_pad = UART_PAD_TX_0,
67  .flags = UART_FLAG_NONE,
68  .gclk_src = SAM0_GCLK_MAIN,
69  }
70 };
71 
72 /* interrupt function name mapping */
73 #define UART_0_ISR isr_sercom0
74 
75 #define UART_NUMOF ARRAY_SIZE(uart_config)
82 static const spi_conf_t spi_config[] = {
83  { /* Internal AT86RF212B */
84  .dev = &(SERCOM4->SPI),
85  .miso_pin = GPIO_PIN(PC, 19),
86  .mosi_pin = GPIO_PIN(PB, 30),
87  .clk_pin = GPIO_PIN(PC, 18),
88  .miso_mux = GPIO_MUX_F,
89  .mosi_mux = GPIO_MUX_F,
90  .clk_mux = GPIO_MUX_F,
91  .miso_pad = SPI_PAD_MISO_0,
92  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
93  .gclk_src = SAM0_GCLK_MAIN,
94 #ifdef MODULE_PERIPH_DMA
95  .tx_trigger = SERCOM4_DMAC_ID_TX,
96  .rx_trigger = SERCOM4_DMAC_ID_RX,
97 #endif
98  },
99  { /* EXT1 & EXT3 Pin Header */
100  .dev = &(SERCOM5->SPI),
101  .miso_pin = GPIO_PIN(PB, 2),
102  .mosi_pin = GPIO_PIN(PB, 22),
103  .clk_pin = GPIO_PIN(PB, 23),
104  .miso_mux = GPIO_MUX_D,
105  .mosi_mux = GPIO_MUX_D,
106  .clk_mux = GPIO_MUX_D,
107  .miso_pad = SPI_PAD_MISO_0,
108  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
109  .gclk_src = SAM0_GCLK_MAIN,
110 #ifdef MODULE_PERIPH_DMA
111  /* The SAML21 doesn't support DMA triggers on SERCOM5 */
112  .tx_trigger = DMA_TRIGGER_DISABLED,
113  .rx_trigger = DMA_TRIGGER_DISABLED,
114 #endif
115  }
116 };
117 
118 #define SPI_NUMOF ARRAY_SIZE(spi_config)
125 static const i2c_conf_t i2c_config[] = {
126  { /* EXT1 & EXT3 Pin Header */
127  .dev = &(SERCOM1->I2CM),
128  .speed = I2C_SPEED_NORMAL,
129  .scl_pin = GPIO_PIN(PA, 17),
130  .sda_pin = GPIO_PIN(PA, 16),
131  .mux = GPIO_MUX_C,
132  .gclk_src = SAM0_GCLK_MAIN,
133  .flags = I2C_FLAG_NONE
134  }
135 };
136 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
143 #define EXTERNAL_OSC32_SOURCE 1
144 #define INTERNAL_OSC32_SOURCE 0
145 #define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
152 #ifndef RTT_FREQUENCY
153 #define RTT_FREQUENCY (32768U)
154 #endif
162 /* ADC Default values */
163 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV256
164 
165 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
166 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
167 
168 static const adc_conf_chan_t adc_channels[] = {
169  /* port, pin, muxpos */
170  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 }, /* EXT1, pin 3 */
171  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 }, /* EXT1, pin 4 */
172  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA10 },
173  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA11 },
174  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }
175 };
176 
177 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
184 static const sam0_common_usb_config_t sam_usbdev_config[] = {
185  {
186  .dm = GPIO_PIN(PA, 24),
187  .dp = GPIO_PIN(PA, 25),
188  .d_mux = GPIO_MUX_G,
189  .device = &USB->DEVICE,
190  .gclk_src = SAM0_GCLK_48MHZ,
191  }
192 };
195 #ifdef __cplusplus
196 }
197 #endif
198 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:42
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:65
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:36
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:274
@ UART_PAD_RX_1
select pad 1
@ PB
port B
@ PC
port C
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
#define DMA_TRIGGER_DISABLED
Indicates that the peripheral doesn't utilize the DMA controller.
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_0
select pad 0
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_C
select peripheral function C
@ GPIO_MUX_F
select peripheral function F
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA10
Alias for PIN18.
Definition: periph_cpu.h:136
#define ADC_INPUTCTRL_MUXPOS_PA11
Alias for PIN19.
Definition: periph_cpu.h:137
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition: periph_cpu.h:125
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition: periph_cpu.h:124
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition: periph_cpu.h:118
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:73
@ SAM0_GCLK_TIMER
4/8MHz clock for timers
Definition: periph_cpu.h:70
@ SAM0_GCLK_48MHZ
48MHz clock
Definition: periph_cpu.h:72
ADC Channel Configuration.
I2C configuration structure.
Definition: periph_cpu.h:295
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:296
USB peripheral parameters.
SPI device configuration.
Definition: periph_cpu.h:333
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:334
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:261
UART device configuration.
Definition: periph_cpu.h:214
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:215