periph_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2020 Benjamin Valentin
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 #include <stdint.h>
19 
20 #include "cpu.h"
21 #include "periph_cpu.h"
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
58 #define CLOCK_USE_PLL (1)
59 
60 #if CLOCK_USE_PLL
61 /* edit these values to adjust the PLL output frequency */
62 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
63 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
64 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
65 #else
66 /* edit this value to your needs */
67 #define CLOCK_DIV (1U)
68 /* generate the actual core clock frequency */
69 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
70 #endif
77 static const tc32_conf_t timer_config[] = {
78  { /* Timer 0 - System Clock */
79  .dev = TC3,
80  .irq = TC3_IRQn,
81  .pm_mask = PM_APBCMASK_TC3,
82  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
83 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
84  .gclk_src = SAM0_GCLK_1MHZ,
85 #else
86  .gclk_src = SAM0_GCLK_MAIN,
87 #endif
88  .flags = TC_CTRLA_MODE_COUNT16,
89  },
90  { /* Timer 1 */
91  .dev = TC4,
92  .irq = TC4_IRQn,
93  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
94  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
95 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
96  .gclk_src = SAM0_GCLK_1MHZ,
97 #else
98  .gclk_src = SAM0_GCLK_MAIN,
99 #endif
100  .flags = TC_CTRLA_MODE_COUNT32,
101  }
102 };
103 
104 #define TIMER_0_MAX_VALUE 0xffff
105 
106 /* interrupt function name mapping */
107 #define TIMER_0_ISR isr_tc3
108 #define TIMER_1_ISR isr_tc4
109 
110 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
117 static const uart_conf_t uart_config[] = {
118  {
119  .dev = &SERCOM2->USART,
120  .rx_pin = GPIO_PIN(PA, 9), /* D5 */
121  .tx_pin = GPIO_PIN(PA, 8), /* D4 */
122  .mux = GPIO_MUX_D,
123  .rx_pad = UART_PAD_RX_1,
124  .tx_pad = UART_PAD_TX_0,
125  .flags = UART_FLAG_NONE,
126  .gclk_src = SAM0_GCLK_MAIN,
127  },
128  {
129  .dev = &SERCOM0->USART,
130  .rx_pin = GPIO_PIN(PA, 5), /* D1 */
131  .tx_pin = GPIO_PIN(PA, 4), /* D0 */
132  .mux = GPIO_MUX_D,
133  .rx_pad = UART_PAD_RX_1,
134  .tx_pad = UART_PAD_TX_0,
135  .flags = UART_FLAG_NONE,
136  .gclk_src = SAM0_GCLK_MAIN,
137  }
138 };
139 
140 /* interrupt function name mapping */
141 #define UART_0_ISR isr_sercom2
142 #define UART_1_ISR isr_sercom0
143 
144 #define UART_NUMOF ARRAY_SIZE(uart_config)
151 #define PWM_0_EN 1
152 #define PWM_1_EN 1
153 
154 #if PWM_0_EN
155 /* PWM0 channels */
156 static const pwm_conf_chan_t pwm_chan0_config[] = {
157  /* GPIO pin, MUX value, TCC channel */
158  { GPIO_PIN(PA, 4), GPIO_MUX_E, 0 },
159  { GPIO_PIN(PA, 5), GPIO_MUX_E, 1 },
160  { GPIO_PIN(PA, 19), GPIO_MUX_F, 3 },
161  { GPIO_PIN(PA, 22), GPIO_MUX_F, 4 },
162  { GPIO_PIN(PA, 23), GPIO_MUX_F, 5 },
163 };
164 #endif
165 #if PWM_1_EN
166 /* PWM1 channels */
167 static const pwm_conf_chan_t pwm_chan1_config[] = {
168  /* GPIO pin, MUX value, TCC channel */
169  { GPIO_PIN(PA, 6), GPIO_MUX_E, 0 },
170  { GPIO_PIN(PA, 7), GPIO_MUX_E, 1 },
171 };
172 #endif
173 
174 /* PWM device configuration */
175 static const pwm_conf_t pwm_config[] = {
176 #if PWM_0_EN
177  {TCC_CONFIG(TCC0), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
178 #endif
179 #if PWM_1_EN
180  {TCC_CONFIG(TCC1), pwm_chan1_config, ARRAY_SIZE(pwm_chan1_config), SAM0_GCLK_MAIN},
181 #endif
182 };
183 
184 /* number of devices that are actually defined */
185 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
192 static const spi_conf_t spi_config[] = {
193  { /* Flash */
194  .dev = &SERCOM1->SPI,
195  .miso_pin = GPIO_PIN(PA, 18),
196  .mosi_pin = GPIO_PIN(PA, 16),
197  .clk_pin = GPIO_PIN(PA, 17),
198  .miso_mux = GPIO_MUX_C,
199  .mosi_mux = GPIO_MUX_C,
200  .clk_mux = GPIO_MUX_C,
201  .miso_pad = SPI_PAD_MISO_2,
202  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
203  .gclk_src = SAM0_GCLK_MAIN,
204 #ifdef MODULE_PERIPH_DMA
205  .tx_trigger = SERCOM1_DMAC_ID_TX,
206  .rx_trigger = SERCOM1_DMAC_ID_RX,
207 #endif
208  },
209  { /* D0 … D2 (user pins) */
210  .dev = &SERCOM0->SPI,
211  .miso_pin = GPIO_PIN(PA, 6), /* D2 */
212  .mosi_pin = GPIO_PIN(PA, 4), /* D0 */
213  .clk_pin = GPIO_PIN(PA, 5), /* D1 */
214  .miso_mux = GPIO_MUX_D,
215  .mosi_mux = GPIO_MUX_D,
216  .clk_mux = GPIO_MUX_D,
217  .miso_pad = SPI_PAD_MISO_2,
218  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
219  .gclk_src = SAM0_GCLK_MAIN,
220 #ifdef MODULE_PERIPH_DMA
221  .tx_trigger = SERCOM0_DMAC_ID_TX,
222  .rx_trigger = SERCOM0_DMAC_ID_RX,
223 #endif
224  },
225 };
226 
227 #define SPI_NUMOF ARRAY_SIZE(spi_config)
234 static const i2c_conf_t i2c_config[] = {
235  {
236  .dev = &(SERCOM2->I2CM),
237  .speed = I2C_SPEED_NORMAL,
238  .scl_pin = GPIO_PIN(PA, 9), /* D5 */
239  .sda_pin = GPIO_PIN(PA, 8), /* D4 */
240  .mux = GPIO_MUX_D,
241  .gclk_src = SAM0_GCLK_MAIN,
242  .flags = I2C_FLAG_NONE
243  }
244 };
245 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
252 #ifndef RTT_FREQUENCY
253 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
254 #endif
261 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
262 
263 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
264 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
265 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
266 
267 static const adc_conf_chan_t adc_channels[] = {
268  /* port, pin, muxpos */
269  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA04 },
270  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA05 },
271  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 },
272  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 },
273  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA08 },
274  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA09 },
275 };
276 
277 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
284 static const sam0_common_usb_config_t sam_usbdev_config[] = {
285  {
286  .dm = GPIO_PIN(PA, 24),
287  .dp = GPIO_PIN(PA, 25),
288  .d_mux = GPIO_MUX_G,
289  .device = &USB->DEVICE,
290  .gclk_src = SAM0_GCLK_MAIN,
291  }
292 };
295 #ifdef __cplusplus
296 }
297 #endif
298 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:42
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:65
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:36
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:218
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: container.h:82
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:274
@ UART_PAD_RX_1
select pad 1
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_2
use pad 2 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_0
select pad 0
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_C
select peripheral function C
@ GPIO_MUX_F
select peripheral function F
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA05
Alias for PIN5.
Definition: periph_cpu.h:123
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition: periph_cpu.h:75
#define ADC_INPUTCTRL_MUXPOS_PA08
Alias for PIN16.
Definition: periph_cpu.h:134
#define ADC_INPUTCTRL_MUXPOS_PA09
Alias for PIN17.
Definition: periph_cpu.h:135
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition: periph_cpu.h:125
#define ADC_INPUTCTRL_MUXPOS_PA04
Alias for PIN4.
Definition: periph_cpu.h:122
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition: periph_cpu.h:124
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition: periph_cpu.h:295
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:296
PWM channel configuration data structure.
PWM device configuration.
USB peripheral parameters.
SPI device configuration.
Definition: periph_cpu.h:333
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:334
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:261
UART device configuration.
Definition: periph_cpu.h:214
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:215