periph_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2017 Kees Bakker, SODAQ
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 #include <stdint.h>
19 
20 #include "cpu.h"
21 #include "periph_cpu.h"
22 #include "cfg_clock_default.h"
23 #include "cfg_rtc_default.h"
24 #include "cfg_rtt_default.h"
25 #include "cfg_timer_default.h"
26 #include "cfg_usbdev_default.h"
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
37 static const uart_conf_t uart_config[] = {
38  {
39  .dev = &SERCOM5->USART,
40  .rx_pin = GPIO_PIN(PB,3), /* D0, RX Pin */
41  .tx_pin = GPIO_PIN(PB,2), /* D1, TX Pin */
42 #ifdef MODULE_PERIPH_UART_HW_FC
43  .rts_pin = GPIO_UNDEF,
44  .cts_pin = GPIO_UNDEF,
45 #endif
46  .mux = GPIO_MUX_D,
47  .rx_pad = UART_PAD_RX_1,
48  .tx_pad = UART_PAD_TX_0,
49  .flags = UART_FLAG_NONE,
50  .gclk_src = SAM0_GCLK_MAIN,
51  },
52  {
53  .dev = &SERCOM2->USART,
54  .rx_pin = GPIO_PIN(PA,13),
55  .tx_pin = GPIO_PIN(PA,12),
56 #ifdef MODULE_PERIPH_UART_HW_FC
57  .rts_pin = GPIO_UNDEF,
58  .cts_pin = GPIO_UNDEF,
59 #endif
60  .mux = GPIO_MUX_C,
61  .rx_pad = UART_PAD_RX_1,
62  .tx_pad = UART_PAD_TX_0,
63  .flags = UART_FLAG_NONE,
64  .gclk_src = SAM0_GCLK_MAIN,
65  },
66 };
67 
68 /* interrupt function name mapping */
69 #define UART_0_ISR isr_sercom5
70 #define UART_1_ISR isr_sercom2
71 
72 #define UART_NUMOF ARRAY_SIZE(uart_config)
80 /* ADC Default values */
81 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
82 
83 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
84 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_DIV2
85 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1
86 
87 static const adc_conf_chan_t adc_channels[] = {
88  /* port, pin, muxpos */
89  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }, /* A0 */
90  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA03 }, /* A1 */
91  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB08 }, /* A2 */
92  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB09 }, /* A3 */
93  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 }, /* A4 */
94  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 }, /* A5 */
95  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA08 }, /* A6 */
96  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA09 }, /* A7 */
97  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA10 }, /* A8 */
98  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA11 }, /* A9 */
99 #if 0
100  /* These pins are also used for RX/TX uart0 */
101  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB02 }, /* A10, TX */
102  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB03 }, /* A11, RX */
103 #endif
104 
105  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA05 }, /* BAT_VOLT */
106 };
107 
108 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
115 static const spi_conf_t spi_config[] = {
116  {
117  .dev = &SERCOM0->SPI,
118  .miso_pin = GPIO_PIN(PA, 8),
119  .mosi_pin = GPIO_PIN(PA, 10),
120  .clk_pin = GPIO_PIN(PA, 11),
121  .miso_mux = GPIO_MUX_C,
122  .mosi_mux = GPIO_MUX_C,
123  .clk_mux = GPIO_MUX_C,
124  .miso_pad = SPI_PAD_MISO_0,
125  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
126  .gclk_src = SAM0_GCLK_MAIN,
127 #ifdef MODULE_PERIPH_DMA
128  .tx_trigger = SERCOM0_DMAC_ID_TX,
129  .rx_trigger = SERCOM0_DMAC_ID_RX,
130 #endif
131  }
132 };
133 
134 #define SPI_NUMOF ARRAY_SIZE(spi_config)
141 static const i2c_conf_t i2c_config[] = {
142  {
143  .dev = &(SERCOM3->I2CM),
144  .speed = I2C_SPEED_NORMAL,
145  .scl_pin = GPIO_PIN(PA, 23),
146  .sda_pin = GPIO_PIN(PA, 22),
147  .mux = GPIO_MUX_C,
148  .gclk_src = SAM0_GCLK_MAIN,
149  .flags = I2C_FLAG_NONE
150  }
151 };
152 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
155 #ifdef __cplusplus
156 }
157 #endif
158 
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:42
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:65
Default RTC configuration for SODAQ boards.
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:274
@ UART_PAD_RX_1
select pad 1
@ PB
port B
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_0
select pad 0
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA05
Alias for PIN5.
Definition: periph_cpu.h:123
#define ADC_INPUTCTRL_MUXPOS_PB08
Alias for PIN2.
Definition: periph_cpu.h:120
#define ADC_INPUTCTRL_MUXPOS_PB02
Alias for PIN10.
Definition: periph_cpu.h:128
#define ADC_INPUTCTRL_MUXPOS_PA10
Alias for PIN18.
Definition: periph_cpu.h:136
#define ADC_INPUTCTRL_MUXPOS_PA11
Alias for PIN19.
Definition: periph_cpu.h:137
#define ADC_INPUTCTRL_MUXPOS_PA08
Alias for PIN16.
Definition: periph_cpu.h:134
#define ADC_INPUTCTRL_MUXPOS_PB09
Alias for PIN3.
Definition: periph_cpu.h:121
#define ADC_INPUTCTRL_MUXPOS_PA09
Alias for PIN17.
Definition: periph_cpu.h:135
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition: periph_cpu.h:125
#define ADC_INPUTCTRL_MUXPOS_PB03
Alias for PIN11.
Definition: periph_cpu.h:129
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition: periph_cpu.h:124
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition: periph_cpu.h:118
#define ADC_INPUTCTRL_MUXPOS_PA03
Alias for PIN1.
Definition: periph_cpu.h:119
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition: periph_cpu.h:295
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:296
SPI device configuration.
Definition: periph_cpu.h:333
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:334
UART device configuration.
Definition: periph_cpu.h:214
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:215