periph_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2018 OTA keys S.A.
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 /* This board provides an LSE */
19 #ifndef CONFIG_BOARD_HAS_LSE
20 #define CONFIG_BOARD_HAS_LSE 1
21 #endif
22 
23 /* This board provides an HSE */
24 #ifndef CONFIG_BOARD_HAS_HSE
25 #define CONFIG_BOARD_HAS_HSE 1
26 #endif
27 
28 /* The HSE provides a 12MHz clock */
29 #ifndef CONFIG_CLOCK_HSE
30 #define CONFIG_CLOCK_HSE MHZ(12)
31 #endif
32 
33 #include "periph_cpu.h"
34 #include "clk_conf.h"
35 #include "cfg_timer_tim5.h"
36 
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40 
45 static const dma_conf_t dma_config[] = {
46  { .stream = 9 }, /* DMA2 Stream 1 - SPI4_TX */
47  { .stream = 8 }, /* DMA2 Stream 0 - SPI4_RX */
48 };
49 
50 #define DMA_0_ISR isr_dma2_stream1
51 #define DMA_1_ISR isr_dma2_stream0
52 
53 #define DMA_NUMOF ARRAY_SIZE(dma_config)
60 static const uart_conf_t uart_config[] = {
61  {
62  .dev = USART1,
63  .rcc_mask = RCC_APB2ENR_USART1EN,
64  .rx_pin = GPIO_PIN(PORT_A, 10),
65  .tx_pin = GPIO_PIN(PORT_A, 9),
66  .rx_af = GPIO_AF7,
67  .tx_af = GPIO_AF7,
68  .bus = APB2,
69  .irqn = USART1_IRQn,
70 #ifdef MODULE_PERIPH_UART_HW_FC
71  .cts_pin = GPIO_UNDEF,
72  .rts_pin = GPIO_UNDEF,
73  .cts_af = GPIO_AF7,
74  .rts_af = GPIO_AF7,
75 #endif
76 #ifdef MODULE_PERIPH_DMA
77  .dma = DMA_STREAM_UNDEF,
78  .dma_chan = UINT8_MAX,
79 #endif
80  },
81  { /* Modem UART */
82  .dev = USART2,
83  .rcc_mask = RCC_APB1ENR_USART2EN,
84  .rx_pin = GPIO_PIN(PORT_D, 6),
85  .tx_pin = GPIO_PIN(PORT_D, 5),
86  .rx_af = GPIO_AF7,
87  .tx_af = GPIO_AF7,
88  .bus = APB1,
89  .irqn = USART2_IRQn,
90 #ifdef MODULE_PERIPH_UART_HW_FC
91  .cts_pin = GPIO_PIN(PORT_D, 3),
92  .rts_pin = GPIO_PIN(PORT_D, 4),
93  .cts_af = GPIO_AF7,
94  .rts_af = GPIO_AF7,
95 #endif
96 #ifdef MODULE_PERIPH_DMA
97  .dma = DMA_STREAM_UNDEF,
98  .dma_chan = UINT8_MAX,
99 #endif
100  },
101  { /* GPS UART */
102  .dev = USART6,
103  .rcc_mask = RCC_APB2ENR_USART6EN,
104  .rx_pin = GPIO_PIN(PORT_C, 7),
105  .tx_pin = GPIO_PIN(PORT_C, 6),
106  .rx_af = GPIO_AF8,
107  .tx_af = GPIO_AF8,
108  .bus = APB2,
109  .irqn = USART6_IRQn,
110 #ifdef MODULE_PERIPH_UART_HW_FC
111  .cts_pin = GPIO_UNDEF,
112  .rts_pin = GPIO_UNDEF,
113  .cts_af = GPIO_AF8,
114  .rts_af = GPIO_AF8,
115 #endif
116 #ifdef MODULE_PERIPH_DMA
117  .dma = DMA_STREAM_UNDEF,
118  .dma_chan = UINT8_MAX,
119 #endif
120  },
121  { /* Arduino Port UART */
122  .dev = USART3,
123  .rcc_mask = RCC_APB1ENR_USART3EN,
124  .rx_pin = GPIO_PIN(PORT_D, 9),
125  .tx_pin = GPIO_PIN(PORT_D, 8),
126  .rx_af = GPIO_AF7,
127  .tx_af = GPIO_AF7,
128  .bus = APB1,
129  .irqn = USART3_IRQn,
130 #ifdef MODULE_PERIPH_UART_HW_FC
131  .cts_pin = GPIO_UNDEF,
132  .rts_pin = GPIO_UNDEF,
133  .cts_af = GPIO_AF7,
134  .rts_af = GPIO_AF7,
135 #endif
136 #ifdef MODULE_PERIPH_DMA
137  .dma = DMA_STREAM_UNDEF,
138  .dma_chan = UINT8_MAX,
139 #endif
140  },
141 };
142 
143 #define UART_0_ISR (isr_usart1)
144 #define UART_1_ISR (isr_usart2)
145 #define UART_2_ISR (isr_usart6)
146 #define UART_3_ISR (isr_usart3)
147 
148 #define UART_NUMOF ARRAY_SIZE(uart_config)
155 static const spi_conf_t spi_config[] = {
156  {
157  .dev = SPI4,
158  .mosi_pin = GPIO_PIN(PORT_E, 6),
159  .miso_pin = GPIO_PIN(PORT_E, 5),
160  .sclk_pin = GPIO_PIN(PORT_E, 2),
161  .cs_pin = GPIO_PIN(PORT_E, 11),
162  .mosi_af = GPIO_AF5,
163  .miso_af = GPIO_AF5,
164  .sclk_af = GPIO_AF5,
165  .cs_af = GPIO_AF5,
166  .rccmask = RCC_APB2ENR_SPI4EN,
167  .apbbus = APB2,
168 #ifdef MODULE_PERIPH_DMA
169  .tx_dma = 0,
170  .tx_dma_chan = 4,
171  .rx_dma = 1,
172  .rx_dma_chan = 4,
173 #endif
174  },
175 };
176 
177 #define SPI_NUMOF ARRAY_SIZE(spi_config)
184 static const i2c_conf_t i2c_config[] = {
185  {
186  .dev = I2C1,
187  .speed = I2C_SPEED_NORMAL,
188  .scl_pin = GPIO_PIN(PORT_B, 6),
189  .sda_pin = GPIO_PIN(PORT_B, 7),
190  .scl_af = GPIO_AF4,
191  .sda_af = GPIO_AF4,
192  .bus = APB1,
193  .rcc_mask = RCC_APB1ENR_I2C1EN,
194  .clk = CLOCK_APB1,
195  .irqn = I2C1_EV_IRQn
196  },
197  {
198  .dev = I2C3,
199  .speed = I2C_SPEED_NORMAL,
200  .scl_pin = GPIO_PIN(PORT_A, 8),
201  .sda_pin = GPIO_PIN(PORT_C, 9),
202  .scl_af = GPIO_AF4,
203  .sda_af = GPIO_AF4,
204  .bus = APB1,
205  .rcc_mask = RCC_APB1ENR_I2C3EN,
206  .clk = CLOCK_APB1,
207  .irqn = I2C3_EV_IRQn
208  }
209 };
210 
211 #define I2C_0_ISR isr_i2c1_ev
212 #define I2C_1_ISR isr_i2c3_ev
213 
214 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
227 static const adc_conf_t adc_config[] = {
228  {GPIO_PIN(PORT_A, 3), 0, 3},
229  {GPIO_PIN(PORT_C, 0), 0, 10},
230  {GPIO_PIN(PORT_C, 3), 0, 4},
231  {GPIO_PIN(PORT_A, 4), 0, 14},
232  {GPIO_PIN(PORT_B, 7), 0, 7},
233  {GPIO_PIN(PORT_B, 6), 0, 6},
234  {GPIO_UNDEF, 0, 18}, /* VBAT */
235 };
236 
237 #define VBAT_ADC ADC_LINE(6)
238 #define ADC_NUMOF ARRAY_SIZE(adc_config)
241 #ifdef __cplusplus
242 }
243 #endif
244 
@ PORT_B
port B
Definition: periph_cpu.h:44
@ PORT_C
port C
Definition: periph_cpu.h:45
@ PORT_E
port E
Definition: periph_cpu.h:47
@ PORT_A
port A
Definition: periph_cpu.h:43
@ PORT_D
port D
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:42
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:35
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:93
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:65
static const adc_conf_t adc_config[]
ADC configuration.
Definition: periph_conf.h:247
Common configuration for STM32 Timer peripheral based on TIM5.
@ GPIO_AF5
use alternate function 5
Definition: cpu_gpio.h:106
@ GPIO_AF4
use alternate function 4
Definition: cpu_gpio.h:105
@ GPIO_AF8
use alternate function 8
Definition: cpu_gpio.h:110
@ GPIO_AF7
use alternate function 7
Definition: cpu_gpio.h:108
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:274
#define CLOCK_APB1
Half AHB clock.
ADC device configuration.
Definition: periph_cpu.h:374
DMA configuration.
Definition: cpu_dma.h:31
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: cpu_dma.h:54
I2C configuration structure.
Definition: periph_cpu.h:295
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:296
SPI device configuration.
Definition: periph_cpu.h:333
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:334
UART device configuration.
Definition: periph_cpu.h:214
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:215