board.h
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1 /*
2  * SPDX-FileCopyrightText: 2017 Eistec AB
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 #include "cpu.h"
19 #include "periph_conf.h"
20 
21 #ifdef __cplusplus
22 extern "C"
23 {
24 #endif
25 
30 #define LED0_PIN GPIO_PIN(PORT_A, 1)
31 #define LED1_PIN GPIO_PIN(PORT_A, 2)
32 #define LED2_PIN GPIO_PIN(PORT_D, 5)
33 
34 #define LED0_MASK (1 << 1)
35 #define LED1_MASK (1 << 2)
36 #define LED2_MASK (1 << 5)
37 
38 #define LED0_ON (GPIOA->PCOR = LED0_MASK)
39 #define LED0_OFF (GPIOA->PSOR = LED0_MASK)
40 #define LED0_TOGGLE (GPIOA->PTOR = LED0_MASK)
41 
42 #define LED1_ON (GPIOA->PCOR = LED1_MASK)
43 #define LED1_OFF (GPIOA->PSOR = LED1_MASK)
44 #define LED1_TOGGLE (GPIOA->PTOR = LED1_MASK)
45 
46 #define LED2_ON (GPIOD->PCOR = LED2_MASK)
47 #define LED2_OFF (GPIOD->PSOR = LED2_MASK)
48 #define LED2_TOGGLE (GPIOD->PTOR = LED2_MASK)
55 /* SW2, SW3 will short these pins to ground when pushed. Both pins have external
56  * pull-up resistors to VDD */
57 /* BTN0 is mapped to SW2 */
58 #define BTN0_PIN GPIO_PIN(PORT_C, 1)
59 #define BTN0_MODE GPIO_IN
60 /* BTN1 is mapped to SW3 */
61 #define BTN1_PIN GPIO_PIN(PORT_B, 17)
62 #define BTN1_MODE GPIO_IN
69 #define FXOS8700_PARAM_I2C I2C_DEV(0)
70 #define FXOS8700_PARAM_ADDR 0x1C
73 #ifdef __cplusplus
74 }
75 #endif
76 
Peripheral MCU configuration for the Zigduino board.