board.h
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1 /*
2  * SPDX-FileCopyrightText: 2014 Freie Universität Berlin
3  * SPDX-FileCopyrightText: 2015 PHYTEC Messtechnik GmbH
4  * SPDX-License-Identifier: LGPL-2.1-only
5  */
6 
7 #pragma once
8 
19 #include "cpu.h"
20 #include "periph_conf.h"
21 
22 #ifdef __cplusplus
23 extern "C"
24 {
25 #endif
26 
31 #define LED0_PIN GPIO_PIN(PORT_B, 22)
32 #define LED1_PIN GPIO_PIN(PORT_E, 26)
33 #define LED2_PIN GPIO_PIN(PORT_B, 21)
34 
35 #define LED0_MASK (1 << 22)
36 #define LED1_MASK (1 << 26)
37 #define LED2_MASK (1 << 21)
38 
39 #define LED0_ON (GPIOB->PCOR = LED0_MASK)
40 #define LED0_OFF (GPIOB->PSOR = LED0_MASK)
41 #define LED0_TOGGLE (GPIOB->PTOR = LED0_MASK)
42 
43 #define LED1_ON (GPIOE->PCOR = LED1_MASK)
44 #define LED1_OFF (GPIOE->PSOR = LED1_MASK)
45 #define LED1_TOGGLE (GPIOE->PTOR = LED1_MASK)
46 
47 #define LED2_ON (GPIOB->PCOR = LED2_MASK)
48 #define LED2_OFF (GPIOB->PSOR = LED2_MASK)
49 #define LED2_TOGGLE (GPIOB->PTOR = LED2_MASK)
56 /* SW2, SW3 will short these pins to ground when pushed. PTA4 has an external
57  * pull-up resistor to VDD, but there is no external pull resistor on PTC6 */
58 /* BTN0 is mapped to SW2 */
59 #define BTN0_PIN GPIO_PIN(PORT_C, 6)
60 #define BTN0_MODE GPIO_IN_PU
61 /* BTN1 is mapped to SW3 */
62 #define BTN1_PIN GPIO_PIN(PORT_A, 4)
63 #define BTN1_MODE GPIO_IN_PU
70 #define FXOS8700_PARAM_I2C I2C_DEV(0)
71 #define FXOS8700_PARAM_ADDR 0x1E
74 #ifdef __cplusplus
75 }
76 #endif
77 
Peripheral MCU configuration for the Zigduino board.