Native CPU peripheral configuration. More...
Native CPU peripheral configuration.
Definition in file periph_conf.h.
#include "macros/units.h"
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Macros | |
| #define | CLOCK_CORECLOCK GHZ(1) |
| System core clock in Hz. More... | |
| #define | NATIVE_TIMER_MIN_RES 200 |
| Hardware timer clock skew avoidance. | |
| #define | RANDOM_NUMOF (1U) |
| Random Number Generator configuration. | |
| #define | UART_NUMOF (1U) |
| UART configuration. | |
| #define | PWM_NUMOF (8U) |
| PWM configuration. | |
| #define | QDEC_NUMOF (8U) |
| QDEC configuration. | |
Timer peripheral configuration | |
| #define | TIMER_NUMOF (1U) |
| #define | TIMER_CHANNEL_NUMOF (1U) |
| Number of timer channels. | |
<tt>xtimer</tt> configuration | |
timer_set_absolute has a high margin for possible underflow if set with value not far in the future. To prevent this, we set high backoff values here. | |
| #define | XTIMER_BACKOFF 200 |
| #define | XTIMER_ISR_BACKOFF 200 |
SPI configuration (Linux host only) | |
| #define | SPI_NUMOF (1U) |
| Amount of SPI devices. More... | |
| #define | SPI_MAXCS (4U) |
| Maximum amount of chip select lines per bus. More... | |
| #define | SPI_HWCS(x) (UINT_MAX - SPI_MAXCS + x) |
| Hardware chip select access macro. More... | |