cpu_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2014 Freie Universität Berlin
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
20 #include "cpu_conf_common.h"
21 #include "vendor/nrf51.h"
22 #include "vendor/nrf51_bitfields.h"
23 #include "vendor/nrf51822_peripherals.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
33 #define CPU_DEFAULT_IRQ_PRIO (1U)
34 #define CPU_IRQ_NUMOF (26U)
35 #define CPU_FLASH_BASE (0x00000000)
42 #define FLASHPAGE_SIZE (1024U)
43 
44 #if defined(CPU_MODEL_NRF51X22XXAA) || defined(CPU_MODEL_NRF51X22XXAC)
45 #define FLASHPAGE_NUMOF (256U)
46 #elif defined(CPU_MODEL_NRF51X22XXAB)
47 #define FLASHPAGE_NUMOF (128U)
48 #endif
49 /* The minimum block size which can be written is 4B. However, the erase
50  * block is always FLASHPAGE_SIZE.
51  */
52 #define FLASHPAGE_WRITE_BLOCK_SIZE (4U)
53 /* Writing should be always 4 bytes aligned */
54 #define FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U)
62 #ifndef CONFIG_GNRC_PKTBUF_SIZE
63 #define CONFIG_GNRC_PKTBUF_SIZE (2048)
64 #endif
71 #define PWM_GPIOTE_CH (2U)
72 #define PWM_PPI_A (0U)
73 #define PWM_PPI_B (1U)
76 #ifdef __cplusplus
77 }
78 #endif
79