cpu_conf.h
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1 /*
2  * SPDX-FileCopyrightText: 2021 Mesotic SAS
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
21 #include "vendor/nrf9160.h"
22 #include "vendor/nrf9160_bitfields.h"
23 #include "vendor/nrf9160_peripherals.h"
24 
25 #include "cpu_conf_common.h"
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
35 #define CPU_DEFAULT_IRQ_PRIO (1U)
36 #define CPU_FLASH_BASE (0x00000000)
38 #define CPU_IRQ_NUMOF (65U)
45 #define FLASHPAGE_SIZE (4096U)
46 #define FLASHPAGE_NUMOF (256U)
48 /* The minimum block size which can be written is 4B. However, the erase
49  * block is always FLASHPAGE_SIZE.
50  */
51 #define FLASHPAGE_WRITE_BLOCK_SIZE (4U)
52 /* Writing should be always 4 bytes aligned */
53 #define FLASHPAGE_WRITE_BLOCK_ALIGNMENT (4U)
56 #ifdef __cplusplus
57 }
58 #endif
59