UART configuration for the RP2350. More...
UART configuration for the RP2350.
Definition in file uart_conf.h.
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| #define | BAUDRATE 115200u |
| UART baud rate in bits per second. | |
| #define | IBRD ((((8u * CPUFREQ) + BAUDRATE) / (2u * BAUDRATE)) / 64u) |
| Integer baud rate divisor. | |
| #define | FBRD ((((8u * CPUFREQ) + BAUDRATE) / (2u * BAUDRATE)) % 64u) |
| Fractional baud rate divisor. | |
| #define | UART_UARTCR_UARTEN_BITS (1u << 0u) |
| UART enable bit in control register. | |
| #define | UART_UARTCR_RXE_BITS (1u << 9u) |
| UART receive enable bit in control register. | |
| #define | UART_UARTCR_TXE_BITS (1u << 8u) |
| UART transmit enable bit in control register. | |
| #define | UART_UARTFR_RXFF_BITS (1u << 6u) |
| UART receive FIFO full flag bit in flag register. | |
| #define | UART_UARTFR_TXFE_BITS (1u << 7u) |
| UART transmit FIFO empty flag bit in flag register. | |
| #define | UART0_UARTDR_BE_Msk (0x400UL) |
| UART data register break error mask. | |
| #define | UART0_UARTDR_PE_Msk (0x200UL) |
| UART data register parity error mask. | |
| #define | UART0_UARTDR_FE_Msk (0x100UL) |
| UART data register framing error mask. | |
| #define | UART0_UARTRIS_TXRIS_Msk (0x20UL) |
| UART raw interrupt status transmit interrupt mask. | |
| #define | UART0_UARTLCR_H_STP2_Msk (0x8UL) |
| UART line control register two stop bits mask. | |
| #define | UART0_UARTLCR_H_EPS_Msk (0x4UL) |
| UART line control register even parity select mask. | |
| #define | UART0_UARTLCR_H_PEN_Msk (0x2UL) |
| UART line control register parity enable mask. | |