periph_cpu.h
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1 /*
2  * SPDX-FileCopyrightText: 2015 Freie Universität Berlin
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 #include <stdbool.h>
19 
20 #include "compiler_hints.h"
21 #include "periph_cpu_common.h"
22 #include "macros/units.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
31 #define USART_NUMOF 2
32 
37 #define USART_MIN_BR_SPI 2
38 
43 #define USART_MIN_BR_UART 3
44 
49 #define HAVE_SPI_MODE_T
58 typedef enum {
59  SPI_MODE_0 = (CKPH),
60  SPI_MODE_1 = 0,
61  SPI_MODE_2 = (CKPL | CKPH),
62  SPI_MODE_3 = (CKPL)
70 #define HAVE_SPI_CLK_T
74 typedef enum {
80 } spi_clk_t;
88 typedef struct {
91  uint8_t tx_irq_mask;
93  uint8_t rx_irq_mask;
95  uint8_t num;
97 
103 typedef enum {
108 
112 typedef struct {
114  uint8_t br0;
115  uint8_t br1;
116  uint8_t mctl;
118 
125 typedef struct {
127  uint8_t ctl;
129 
139 typedef struct {
148  uint8_t tx_enable_mask;
160  gpio_t rxd;
161  gpio_t txd;
163 
167 typedef struct {
169 } uart_conf_t;
170 
181 typedef struct {
190  uint8_t enable_mask;
191  gpio_t miso;
192  gpio_t mosi;
193  gpio_t sck;
195 
199 typedef struct {
201 } spi_conf_t;
202 
207 
212 
217 
222 
227 #define PERIPH_SPI_NEEDS_INIT_CS
228 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE
229 #define PERIPH_SPI_NEEDS_TRANSFER_REG
230 #define PERIPH_SPI_NEEDS_TRANSFER_REGS
241 static inline void msp430_usart_enable_tx_irq(const msp430_usart_params_t *usart_conf)
242 {
243  usart_conf->sfr->IE |= usart_conf->tx_irq_mask;
244 }
245 
254 static inline void msp430_usart_enable_rx_irq(const msp430_usart_params_t *usart_conf)
255 {
256  usart_conf->sfr->IE |= usart_conf->rx_irq_mask;
257 }
258 
267 static inline void msp430_usart_disable_tx_irq(const msp430_usart_params_t *usart_conf)
268 {
269  usart_conf->sfr->IE &= ~(usart_conf->tx_irq_mask);
270 }
271 
280 static inline void msp430_usart_disable_rx_irq(const msp430_usart_params_t *usart_conf)
281 {
282  usart_conf->sfr->IE &= ~(usart_conf->rx_irq_mask);
283 }
284 
291 static inline bool msp430_usart_get_tx_irq_flag(const msp430_usart_params_t *usart_conf)
292 {
293  return usart_conf->sfr->IFG & usart_conf->tx_irq_mask;
294 }
295 
302 static inline bool msp430_usart_get_rx_irq_flag(const msp430_usart_params_t *usart_conf)
303 {
304  return usart_conf->sfr->IFG & usart_conf->rx_irq_mask;
305 }
306 
313 static inline bool msp430_usart_are_both_irq_flags_set(const msp430_usart_params_t *usart_conf)
314 {
315  const uint8_t mask = usart_conf->tx_irq_mask | usart_conf->rx_irq_mask;
316  return (usart_conf->sfr->IFG & mask) == mask;
317 }
318 
323 static inline void msp430_usart_clear_tx_irq_flag(const msp430_usart_params_t *usart_conf)
324 {
325  usart_conf->sfr->IFG &= ~(usart_conf->tx_irq_mask);
326 }
327 
332 static inline void msp430_usart_clear_rx_irq_flag(const msp430_usart_params_t *usart_conf)
333 {
334  usart_conf->sfr->IFG &= ~(usart_conf->rx_irq_mask);
335 }
336 
352  const msp430_usart_conf_t *conf,
353  uint8_t enable_mask);
354 
361 
382 msp430_usart_prescaler_t msp430_usart_prescale(uint32_t clock, uint16_t min_br);
383 #ifdef __cplusplus
384 }
385 #endif
386 
spi_clk_t
Definition: periph_cpu.h:348
Common macros and compiler attributes/pragmas configuration.
@ SPI_MODE_0
CPOL=0, CPHA=0.
Definition: periph_cpu.h:40
@ SPI_MODE_2
CPOL=1, CPHA=0.
Definition: periph_cpu.h:42
@ SPI_MODE_1
CPOL=0, CPHA=1.
Definition: periph_cpu.h:41
@ SPI_MODE_3
CPOL=1, CPHA=1.
Definition: periph_cpu.h:43
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition: periph_cpu.h:353
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition: periph_cpu.h:352
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition: periph_cpu.h:350
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition: periph_cpu.h:351
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition: periph_cpu.h:349
spi_mode_t
Support SPI modes.
Definition: periph_cpu.h:39
const msp430_usart_spi_params_t usart1_as_spi
MSP430 x1xx USART1 in SPI configuration.
const msp430_usart_uart_params_t usart1_as_uart
MSP430 x1xx USART1 in UART configuration.
static void msp430_usart_clear_tx_irq_flag(const msp430_usart_params_t *usart_conf)
Clear the TX IRQ flag of the given USART.
Definition: periph_cpu.h:323
static void msp430_usart_enable_tx_irq(const msp430_usart_params_t *usart_conf)
Enable the TX interrupt on the given USART.
Definition: periph_cpu.h:241
static bool msp430_usart_get_tx_irq_flag(const msp430_usart_params_t *usart_conf)
Get the TX IRQ flag of the given USART.
Definition: periph_cpu.h:291
static bool msp430_usart_get_rx_irq_flag(const msp430_usart_params_t *usart_conf)
Get the RX IRQ flag of the given USART.
Definition: periph_cpu.h:302
const msp430_usart_spi_params_t usart0_as_spi
MSP430 x1xx USART0 in SPI configuration.
void msp430_usart_release(const msp430_usart_params_t *params)
Release exclusive access to an USART peripheral and turn it off again.
const msp430_usart_uart_params_t usart0_as_uart
MSP430 x1xx USART0 in UART configuration.
void msp430_usart_acquire(const msp430_usart_params_t *params, const msp430_usart_conf_t *conf, uint8_t enable_mask)
Get exclusive access to an USART peripheral and initialize it for operation as configured.
msp430_usart_clk_t
MSP430 x1xx USART clock source.
Definition: periph_cpu.h:103
@ USART_CLK_UCLKI
UCLKI clock source (not supported yet)
Definition: periph_cpu.h:104
@ USART_CLK_AUX
auxiliary clock source
Definition: periph_cpu.h:105
@ USART_CLK_SUBMAIN
sub-system master clock source
Definition: periph_cpu.h:106
static void msp430_usart_disable_rx_irq(const msp430_usart_params_t *usart_conf)
Disable the RX interrupt on the given USART.
Definition: periph_cpu.h:280
static void msp430_usart_enable_rx_irq(const msp430_usart_params_t *usart_conf)
Enable the RX interrupt on the given USART.
Definition: periph_cpu.h:254
static void msp430_usart_clear_rx_irq_flag(const msp430_usart_params_t *usart_conf)
Clear the RX IRQ flag of the given USART.
Definition: periph_cpu.h:332
static void msp430_usart_disable_tx_irq(const msp430_usart_params_t *usart_conf)
Disable the TX interrupt on the given USART.
Definition: periph_cpu.h:267
static bool msp430_usart_are_both_irq_flags_set(const msp430_usart_params_t *usart_conf)
Check if both TX and RX IRQ flags are set on the given USART.
Definition: periph_cpu.h:313
msp430_usart_prescaler_t msp430_usart_prescale(uint32_t clock, uint16_t min_br)
Compute a suitable prescaler.
MSP430 x1xx USART configuration registers.
Definition: periph_cpu.h:125
uint8_t ctl
USART control register.
Definition: periph_cpu.h:127
msp430_usart_prescaler_t prescaler
Prescaler configuration.
Definition: periph_cpu.h:126
MSP430 x1xx USART configuration.
Definition: periph_cpu.h:88
uint8_t rx_irq_mask
The bitmask to enable the TX IRQ for this USART.
Definition: periph_cpu.h:93
msp430_usart_t * dev
The USART device to use.
Definition: periph_cpu.h:89
uint8_t tx_irq_mask
The bitmask to enable the TX IRQ for this USART.
Definition: periph_cpu.h:91
msp430_usart_sfr_t * sfr
The corresponding SFR registers.
Definition: periph_cpu.h:90
uint8_t num
Number of the USART.
Definition: periph_cpu.h:95
MSP430 x1xx USART prescaler configuration.
Definition: periph_cpu.h:112
msp430_usart_clk_t clk_source
Clock source to use.
Definition: periph_cpu.h:113
uint8_t br0
What to write in the BR0 register.
Definition: periph_cpu.h:114
uint8_t br1
What to write in the BR1 register.
Definition: periph_cpu.h:115
uint8_t mctl
USART modulation control register.
Definition: periph_cpu.h:116
USART Special Function Registers (SFR)
Definition: msp430_regs.h:66
REG8 IE
USART Interrupt Enable Register.
Definition: msp430_regs.h:67
REG8 IFG
USART Interrupt Flag Register.
Definition: msp430_regs.h:69
MSP430 x1xx SPI configuration, CPU level.
Definition: periph_cpu.h:181
uint8_t enable_mask
The bitmask to write to the SFR register to enable the USART device in SPI mode.
Definition: periph_cpu.h:190
gpio_t mosi
COPI (MOSI) pin.
Definition: periph_cpu.h:192
gpio_t miso
CIPO (MISO) pin.
Definition: periph_cpu.h:191
msp430_usart_params_t usart_params
The USART parameters.
Definition: periph_cpu.h:182
USART (UART, SPI and I2C) Registers.
Definition: msp430_regs.h:44
MSP430 x1xx UART configuration, CPU level.
Definition: periph_cpu.h:139
msp430_usart_params_t usart_params
The USART params.
Definition: periph_cpu.h:140
uint8_t tx_enable_mask
The bitmask to write to the SFR register to enable the USART device in UART mode with TX enabled.
Definition: periph_cpu.h:148
uint8_t rxtx_enable_mask
The bitmask to write to the SFR register to enable the USART device in UART mode with RX+TX enabled.
Definition: periph_cpu.h:159
SPI device configuration.
Definition: periph_cpu.h:333
const msp430_usart_spi_params_t * spi
The SPI configuration to use.
Definition: periph_cpu.h:200
UART device configuration.
Definition: periph_cpu.h:214
const msp430_usart_uart_params_t * uart
The UART configuration to use.
Definition: periph_cpu.h:168
Unit helper macros.
#define MHZ(x)
A macro to return the Hz in x MHz.
Definition: units.h:48
#define KHZ(x)
A macro to return the Hz in x kHz.
Definition: units.h:43
#define UXTCTL_SSEL_ACLK
Clock USART using auxiliary clock.
Definition: msp430_regs.h:84
#define UXTCTL_SSEL_UCLKI
Clock USART using UCLKI clock.
Definition: msp430_regs.h:83
#define UXTCTL_SSEL_SMCLK
Clock USART using sub-system master clock.
Definition: msp430_regs.h:85