Fault register bits

In normal conditions, all bits are cleared. More...

Detailed Description

In normal conditions, all bits are cleared.

Bits 0 and 1 are not used.

During measurement, the reference resistor and the RTD are connected in series. During a fault detection cycle initiated by the master, the IC can open an internal switch on the FORCE- pin.

• When the FORCE- switch is closed, current should flow through the reference resistor and V_REFIN- is expected to be less than 0.85 × V_BIAS.
• When the FORCE- switch is open, no current should flow through the reference resistor nor the RTD and both V_REFIN- and V_RTDIN- are expected to be greater than 0.85 × V_BIAS.

The table below sums up the fault conditions when the FORCE- switch is open. The two left-most column reflect the values of the bits masked by MAX31865_FLT_REF_FO and MAX31865_FLT_RTD_FO.

VREFIN-	VRTDIN-	Fault
0	0	no error
0	1	RTD disconnected from the RTD- pin
1	0	RTD- is shorted to VCC; very unlikely
1	1	RTD disconnected from the RTD+ pin or shorted

In the last case, it can be asserted that the RTD terminals are shorted together if the bit masked by MAX31865_FLT_THRESLOW is set.

Macros
#define	MAX31865_FLT_THRESHIGH   (0b10000000)
	Fault: RTD is greater than the high threshold.
#define	MAX31865_FLT_THRESLOW   (0b01000000)
	Fault: RTD is less than the low threshold.
#define	MAX31865_FLT_REF_FC   (0b00100000)
	Fault: VREFIN- > 0.85 × VBIAS when FORCE- is closed.
#define	MAX31865_FLT_REF_FO   (0b00010000)
	Fault: VREFIN- < 0.85 × VBIAS when FORCE- is open.
#define	MAX31865_FLT_RTD_FO   (0b00001000)
	Fault: VRTDIN- < 0.85 × × VBIAS when FORCE- is open.
#define	MAX31865_FLT_VOLTAGE   (0b00000100)
	Fault: overvoltage or undervoltage condition. More...

Macro Definition Documentation

MAX31865_FLT_VOLTAGE

#define MAX31865_FLT_VOLTAGE   (0b00000100)

Fault: overvoltage or undervoltage condition.

Overvoltage or undervoltage condition on at least one of the FORCE or RTD pins.

Definition at line 212 of file max31865_internal.h.