periph_cpu.h
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1 /*
2  * Copyright (C) 2015 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
21 #include <stdbool.h>
22 
23 #include "compiler_hints.h"
24 #include "periph_cpu_common.h"
25 #include "macros/units.h"
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
34 #define USART_NUMOF 2
35 
40 #define USART_MIN_BR_SPI 2
41 
46 #define USART_MIN_BR_UART 3
47 
52 #define HAVE_SPI_MODE_T
61 typedef enum {
62  SPI_MODE_0 = (CKPH),
63  SPI_MODE_1 = 0,
64  SPI_MODE_2 = (CKPL | CKPH),
65  SPI_MODE_3 = (CKPL)
73 #define HAVE_SPI_CLK_T
77 typedef enum {
83 } spi_clk_t;
91 typedef struct {
94  uint8_t tx_irq_mask;
96  uint8_t rx_irq_mask;
98  uint8_t num;
100 
106 typedef enum {
111 
115 typedef struct {
117  uint8_t br0;
118  uint8_t br1;
119  uint8_t mctl;
121 
128 typedef struct {
130  uint8_t ctl;
132 
142 typedef struct {
151  uint8_t tx_enable_mask;
163  gpio_t rxd;
164  gpio_t txd;
166 
170 typedef struct {
172 } uart_conf_t;
173 
184 typedef struct {
193  uint8_t enable_mask;
194  gpio_t miso;
195  gpio_t mosi;
196  gpio_t sck;
198 
202 typedef struct {
204 } spi_conf_t;
205 
210 
215 
220 
225 
230 #define PERIPH_SPI_NEEDS_INIT_CS
231 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE
232 #define PERIPH_SPI_NEEDS_TRANSFER_REG
233 #define PERIPH_SPI_NEEDS_TRANSFER_REGS
244 static inline void msp430_usart_enable_tx_irq(const msp430_usart_params_t *usart_conf)
245 {
246  usart_conf->sfr->IE |= usart_conf->tx_irq_mask;
247 }
248 
257 static inline void msp430_usart_enable_rx_irq(const msp430_usart_params_t *usart_conf)
258 {
259  usart_conf->sfr->IE |= usart_conf->rx_irq_mask;
260 }
261 
270 static inline void msp430_usart_disable_tx_irq(const msp430_usart_params_t *usart_conf)
271 {
272  usart_conf->sfr->IE &= ~(usart_conf->tx_irq_mask);
273 }
274 
283 static inline void msp430_usart_disable_rx_irq(const msp430_usart_params_t *usart_conf)
284 {
285  usart_conf->sfr->IE &= ~(usart_conf->rx_irq_mask);
286 }
287 
294 static inline bool msp430_usart_get_tx_irq_flag(const msp430_usart_params_t *usart_conf)
295 {
296  return usart_conf->sfr->IFG & usart_conf->tx_irq_mask;
297 }
298 
305 static inline bool msp430_usart_get_rx_irq_flag(const msp430_usart_params_t *usart_conf)
306 {
307  return usart_conf->sfr->IFG & usart_conf->rx_irq_mask;
308 }
309 
316 static inline bool msp430_usart_are_both_irq_flags_set(const msp430_usart_params_t *usart_conf)
317 {
318  const uint8_t mask = usart_conf->tx_irq_mask | usart_conf->rx_irq_mask;
319  return (usart_conf->sfr->IFG & mask) == mask;
320 }
321 
326 static inline void msp430_usart_clear_tx_irq_flag(const msp430_usart_params_t *usart_conf)
327 {
328  usart_conf->sfr->IFG &= ~(usart_conf->tx_irq_mask);
329 }
330 
335 static inline void msp430_usart_clear_rx_irq_flag(const msp430_usart_params_t *usart_conf)
336 {
337  usart_conf->sfr->IFG &= ~(usart_conf->rx_irq_mask);
338 }
339 
355  const msp430_usart_conf_t *conf,
356  uint8_t enable_mask);
357 
364 
385 msp430_usart_prescaler_t msp430_usart_prescale(uint32_t clock, uint16_t min_br);
386 #ifdef __cplusplus
387 }
388 #endif
389 
spi_clk_t
Definition: periph_cpu.h:351
Common macros and compiler attributes/pragmas configuration.
@ SPI_MODE_0
CPOL=0, CPHA=0.
Definition: periph_cpu.h:43
@ SPI_MODE_2
CPOL=1, CPHA=0.
Definition: periph_cpu.h:45
@ SPI_MODE_1
CPOL=0, CPHA=1.
Definition: periph_cpu.h:44
@ SPI_MODE_3
CPOL=1, CPHA=1.
Definition: periph_cpu.h:46
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition: periph_cpu.h:356
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition: periph_cpu.h:355
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition: periph_cpu.h:353
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition: periph_cpu.h:354
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition: periph_cpu.h:352
spi_mode_t
Support SPI modes.
Definition: periph_cpu.h:42
const msp430_usart_spi_params_t usart1_as_spi
MSP430 x1xx USART1 in SPI configuration.
const msp430_usart_uart_params_t usart1_as_uart
MSP430 x1xx USART1 in UART configuration.
static void msp430_usart_clear_tx_irq_flag(const msp430_usart_params_t *usart_conf)
Clear the TX IRQ flag of the given USART.
Definition: periph_cpu.h:326
static void msp430_usart_enable_tx_irq(const msp430_usart_params_t *usart_conf)
Enable the TX interrupt on the given USART.
Definition: periph_cpu.h:244
static bool msp430_usart_get_tx_irq_flag(const msp430_usart_params_t *usart_conf)
Get the TX IRQ flag of the given USART.
Definition: periph_cpu.h:294
static bool msp430_usart_get_rx_irq_flag(const msp430_usart_params_t *usart_conf)
Get the RX IRQ flag of the given USART.
Definition: periph_cpu.h:305
const msp430_usart_spi_params_t usart0_as_spi
MSP430 x1xx USART0 in SPI configuration.
void msp430_usart_release(const msp430_usart_params_t *params)
Release exclusive access to an USART peripheral and turn it off again.
const msp430_usart_uart_params_t usart0_as_uart
MSP430 x1xx USART0 in UART configuration.
void msp430_usart_acquire(const msp430_usart_params_t *params, const msp430_usart_conf_t *conf, uint8_t enable_mask)
Get exclusive access to an USART peripheral and initialize it for operation as configured.
msp430_usart_clk_t
MSP430 x1xx USART clock source.
Definition: periph_cpu.h:106
@ USART_CLK_UCLKI
UCLKI clock source (not supported yet)
Definition: periph_cpu.h:107
@ USART_CLK_AUX
auxiliary clock source
Definition: periph_cpu.h:108
@ USART_CLK_SUBMAIN
sub-system master clock source
Definition: periph_cpu.h:109
static void msp430_usart_disable_rx_irq(const msp430_usart_params_t *usart_conf)
Disable the RX interrupt on the given USART.
Definition: periph_cpu.h:283
static void msp430_usart_enable_rx_irq(const msp430_usart_params_t *usart_conf)
Enable the RX interrupt on the given USART.
Definition: periph_cpu.h:257
static void msp430_usart_clear_rx_irq_flag(const msp430_usart_params_t *usart_conf)
Clear the RX IRQ flag of the given USART.
Definition: periph_cpu.h:335
static void msp430_usart_disable_tx_irq(const msp430_usart_params_t *usart_conf)
Disable the TX interrupt on the given USART.
Definition: periph_cpu.h:270
static bool msp430_usart_are_both_irq_flags_set(const msp430_usart_params_t *usart_conf)
Check if both TX and RX IRQ flags are set on the given USART.
Definition: periph_cpu.h:316
msp430_usart_prescaler_t msp430_usart_prescale(uint32_t clock, uint16_t min_br)
Compute a suitable prescaler.
MSP430 x1xx USART configuration registers.
Definition: periph_cpu.h:128
uint8_t ctl
USART control register.
Definition: periph_cpu.h:130
msp430_usart_prescaler_t prescaler
Prescaler configuration.
Definition: periph_cpu.h:129
MSP430 x1xx USART configuration.
Definition: periph_cpu.h:91
uint8_t rx_irq_mask
The bitmask to enable the TX IRQ for this USART.
Definition: periph_cpu.h:96
msp430_usart_t * dev
The USART device to use.
Definition: periph_cpu.h:92
uint8_t tx_irq_mask
The bitmask to enable the TX IRQ for this USART.
Definition: periph_cpu.h:94
msp430_usart_sfr_t * sfr
The corresponding SFR registers.
Definition: periph_cpu.h:93
uint8_t num
Number of the USART.
Definition: periph_cpu.h:98
MSP430 x1xx USART prescaler configuration.
Definition: periph_cpu.h:115
msp430_usart_clk_t clk_source
Clock source to use.
Definition: periph_cpu.h:116
uint8_t br0
What to write in the BR0 register.
Definition: periph_cpu.h:117
uint8_t br1
What to write in the BR1 register.
Definition: periph_cpu.h:118
uint8_t mctl
USART modulation control register.
Definition: periph_cpu.h:119
USART Special Function Registers (SFR)
Definition: msp430_regs.h:69
REG8 IE
USART Interrupt Enable Register.
Definition: msp430_regs.h:70
REG8 IFG
USART Interrupt Flag Register.
Definition: msp430_regs.h:72
MSP430 x1xx SPI configuration, CPU level.
Definition: periph_cpu.h:184
uint8_t enable_mask
The bitmask to write to the SFR register to enable the USART device in SPI mode.
Definition: periph_cpu.h:193
gpio_t mosi
COPI (MOSI) pin.
Definition: periph_cpu.h:195
gpio_t miso
CIPO (MISO) pin.
Definition: periph_cpu.h:194
msp430_usart_params_t usart_params
The USART parameters.
Definition: periph_cpu.h:185
USART (UART, SPI and I2C) Registers.
Definition: msp430_regs.h:47
MSP430 x1xx UART configuration, CPU level.
Definition: periph_cpu.h:142
msp430_usart_params_t usart_params
The USART params.
Definition: periph_cpu.h:143
uint8_t tx_enable_mask
The bitmask to write to the SFR register to enable the USART device in UART mode with TX enabled.
Definition: periph_cpu.h:151
uint8_t rxtx_enable_mask
The bitmask to write to the SFR register to enable the USART device in UART mode with RX+TX enabled.
Definition: periph_cpu.h:162
SPI device configuration.
Definition: periph_cpu.h:336
const msp430_usart_spi_params_t * spi
The SPI configuration to use.
Definition: periph_cpu.h:203
UART device configuration.
Definition: periph_cpu.h:217
const msp430_usart_uart_params_t * uart
The UART configuration to use.
Definition: periph_cpu.h:171
Unit helper macros.
#define MHZ(x)
A macro to return the Hz in x MHz.
Definition: units.h:48
#define KHZ(x)
A macro to return the Hz in x kHz.
Definition: units.h:43
#define UXTCTL_SSEL_ACLK
Clock USART using auxiliary clock.
Definition: msp430_regs.h:87
#define UXTCTL_SSEL_UCLKI
Clock USART using UCLKI clock.
Definition: msp430_regs.h:86
#define UXTCTL_SSEL_SMCLK
Clock USART using sub-system master clock.
Definition: msp430_regs.h:88