cfg_usb_otg_hs_phy_fs.h
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1 /*
2  * SPDX-FileCopyrightText: 2019 Koen Zandberg
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
22 #include "periph_cpu.h"
23 #include "usbdev_synopsys_dwc2.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
32 #define DWC2_USB_OTG_HS_ENABLED
33 
37 static const dwc2_usb_otg_fshs_config_t dwc2_usb_otg_fshs_config[] = {
38  {
39  .periph = USB_OTG_HS_PERIPH_BASE,
40  .type = DWC2_USB_OTG_HS,
41  .phy = DWC2_USB_OTG_PHY_BUILTIN,
42  .rcc_mask = RCC_AHB1ENR_OTGHSEN,
43  .irqn = OTG_HS_IRQn,
44  .ahb = AHB1,
45  .dm = GPIO_PIN(PORT_B, 14),
46  .dp = GPIO_PIN(PORT_B, 15),
47  .af = GPIO_AF12,
48  }
49 };
50 
54 #define USBDEV_NUMOF ARRAY_SIZE(dwc2_usb_otg_fshs_config)
55 
56 #ifdef __cplusplus
57 }
58 #endif
59 
PORT_B
@ PORT_B
port B
Definition: periph_cpu.h:44
GPIO_PIN
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:42
dwc2_usb_otg_fshs_config
static const dwc2_usb_otg_fshs_config_t dwc2_usb_otg_fshs_config[]
Common USB OTG FS configuration.
Definition: cfg_usb_otg_hs_phy_fs.h:37
GPIO_AF12
@ GPIO_AF12
use alternate function 12
Definition: cpu_gpio.h:111
dwc2_usb_otg_fshs_config_t
USB OTG configuration.
Definition: usbdev_synopsys_dwc2.h:79
dwc2_usb_otg_fshs_config_t::periph
uintptr_t periph
USB peripheral base address.
Definition: usbdev_synopsys_dwc2.h:80
usbdev_synopsys_dwc2.h
Low level USB FS/HS driver definitions for MCUs with Synopsys DWC2 IP core.
DWC2_USB_OTG_PHY_BUILTIN
@ DWC2_USB_OTG_PHY_BUILTIN
on-chip FS PHY
Definition: usbdev_synopsys_dwc2.h:71
DWC2_USB_OTG_HS
@ DWC2_USB_OTG_HS
High speed peripheral.
Definition: usbdev_synopsys_dwc2.h:48